Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2000-04-03
2002-02-05
Metjahic, Safet (Department: 3858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C029S025010, C414S737000
Reexamination Certificate
active
06344737
ABSTRACT:
TECHNICAL FIELD
This invention relates to integrated circuit package handling systems, and more particularly, to a picker nest design that minimizes stress on an integrated circuit component while the picker nest is holding an integrated circuit package within an integrated circuit testing system.
BACKGROUND OF THE INVENTION
For distribution, an IC (Integrated Circuit) die is mounted within an IC (Integrated Circuit) package. Within such a package, metal leads connect contact pads within the IC die to pins on the IC package. Such pins provide connection from the IC die to other components external to the IC package. To ensure proper packaging of the IC die, the IC package having the IC die mounted thereon is tested. In such testing, the pins on the IC package are coupled to test contacts of a testing system, and various measurements are performed from the test contacts to determine proper IC packaging.
An example of a IC package handler, within an integrated circuit testing system, is the Delta Flex Test Handler, Model 1240, available from Delta Design, Inc., San Diego, Calif. Referring to
FIG. 1
, such an IC package handling system
100
includes an input mechanism
102
, a core unit
104
, and an output mechanism
106
. The input mechanism
102
carries the IC packages to be tested into the core unit
104
and onto a storage boat
108
, already carrying IC packages
110
and
112
in FIG.
1
. The storage boat
108
carries the IC packages
110
and
112
until the IC packages reach a desired temperature for testing.
At that point, a core picker assembly
114
picks up an IC package from the storage boat
108
for testing. The core picker assembly includes a picker body
116
and a picker nest
118
. The core picker assembly
114
picks up and holds an IC package from the storage boat
108
. The core picker assembly then moves the IC package to test contacts
120
such that pins on the IC package make contact with the test contacts
120
for testing of the IC package. The core picker assembly
114
also holds the IC package to the test contacts
120
during testing. The core unit
104
also includes a temperature control unit
122
for adjusting the temperature within the core unit
104
such that the IC package may be tested for various environmental temperatures.
Once the testing of an IC package is complete, the output mechanism
106
includes an output boat
123
which receives the tested IC packages from the core picker assembly
114
after testing and which carries the tested IC packages to a sorting unit
124
. When a tested IC package is at the sorting unit
124
, each IC package is sorted into a respective bin depending on the results of testing that IC package within the core unit
104
. For example, if the result of testing an IC package is performance failure, that IC package is placed into a “bad chip” tube
126
, and if the result is performance success, the package is placed into a “good chip” tube
128
.
Referring to
FIGS. 2A and 2B
, the conventional core picker assembly includes a picker nest
200
having a picker head
202
with a single suction cup
204
for picking up and holding an IC package to the test contacts
120
of
FIG. 1
during testing.
FIG. 2B
is a bottom view of the picker nest
200
of FIG.
2
A. Such a picker nest with a single suction cup is sufficient for picking up and holding an IC package which has a molding covering the IC die that is mounted on the IC package.
Referring to
FIG. 3
, such an IC package
300
includes an IC die
302
mounted on a package substrate
304
. A molding
306
covers and protects the IC die
302
. The suction cup
204
would contact the molding
306
when the core picker assembly is picking up and holding the IC package
300
to the test contacts
120
for testing.
However, IC packages are available in a variety of sizes, shapes, and configurations. For example, the CBGA (Ceramic Ball Grid Array)
360
which is used for packaging the K6 Microprocessor from Advanced Micro Devices, Inc., Santa Clara, Calif., may need testing with a packaging configuration as shown in
FIGS. 4A and 4B
.
Referring to
FIG. 4A
, the CBGA
360
package
400
that may need testing includes a bare IC die
402
mounted on a first surface
404
of a ceramic package substrate
406
. Capacitors
408
,
410
,
412
,
414
,
416
, and
418
may be included for coupling to the IC die
402
.
FIG. 4A
shows the first surface
404
of the CBGA
360
package.
FIG. 4B
shows a second surface
420
of the CBGA
360
package. This second surface
420
includes a grid array
422
of substantially spherical balls that are package pins which couple to circuit pads within the IC die
402
. The CBGA
360
package includes a grid array of 19 rows by 19 columns of ball pins. However, the grid array
422
of 4 rows by 4 columns of ball pins is shown in
FIG. 4B
for clarity of illustration. This grid array of ball pins
422
makes contact with the test contacts
120
of
FIG. 1
during testing.
Because of the bare IC die
402
mounted on the package substrate
406
, a conventional picker nest
200
with the single suction cup
204
of
FIG. 2A
may apply unacceptable stress on the die
402
when the core picker assembly is picking up or holding the CBGA
360
package for testing. Moreover, a suction cup of the prior art which typically includes a plastic O-ring or a sponge may not sufficiently seal in the vacuum within the suction cup during testing at lower temperatures such as 0° Celsius to −55° Celsius (or below). However, a package configuration, such as the CBGA
360
package, which includes a bare IC die may be desirable for some integrated circuits, and such a package may still need testing at various temperatures.
SUMMARY OF THE INVENTION
Accordingly, a primary object of the present invention is to pick up and hold such an IC package having a fragile integrated circuit component, such as a bare IC die, mounted thereon without inducing unacceptable stress on the fragile component during IC package testing at various temperatures.
In a general aspect of the present invention, a picker nest which holds the IC package for testing includes a picker nest head having a picker nest opening with vacuum suction for holding the IC package. The dimensions of the picker nest opening are larger than the dimensions of the fragile component such that the fragile component fits within the picker nest opening when the picker nest is holding the IC package. In addition, a conductive seal disposed on the picker nest head and disposed outside the perimeter of the picker nest opening seals the vacuum suction within the picker nest opening.
Furthermore, at least one supporting bar disposed on the picker nest head supports the package substrate against the picker nest head when the picker nest is holding the IC package.
The present invention can be used to particular advantage when the picker nest head and the at least one supporting bar are comprised of aluminum. In that case, the picker nest head and the supporting bar provide ESD (Electro Static Discharge) protection for the IC package during testing. The conductive seal which seals the vacuum suction within the picker nest opening may be a silicon-based sponge to ensure sufficient vacuum seal at lower temperatures.
Such a picker nest does not induce contact force on the fragile component mounted on the IC package since the fragile component fits within the picker nest opening when the picker nest is holding the IC package. Thus, the present invention is particularly amenable for holding an IC package such as the CBGA
360
package that has a bare IC die mounted on the package substrate.
These and other features and advantages of the present invention will be better understood by considering the following detailed description of the invention which is presented with the attached drawings.
REFERENCES:
patent: 5231753 (1993-08-01), Tanaka et al.
patent: 5574383 (1996-11-01), Saito et al.
patent: 5757200 (1998-05-01), Yamashita
patent: 6099597 (2000-08-01), Yap et al.
Wee Boon Hee
Yap Thean Loy
Advanced Micro Devices , Inc.
Choi Monica H.
Metjahic Safet
Nguyen Jimmy
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