Physical memory layout with various sized memory sectors

Details Physical memory layout with various sized memory sectors Physical memory layout with various sized memory sectors

2000-08-23

2003-05-20

Elms, Richard (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S051000, C365S230030, C711S163000, C711S202000

Reexamination Certificate

active

06567289

ABSTRACT:

BACKGROUND
The present invention relates generally to a method of laying out memory sectors.
Flash memory devices have been widely used in computers and mobile devices such as cellular telephones, digital cameras, and video games. The flash memory devices can include a memory array, an address decoder, and data lines. The memory array is often divided into sectors. Flash memory devices can have sector protection that protects the data stored in a memory sector; the sector protection blocks the erase and program functions. Multiple sectors can be protected at one time; the status of protection for each memory sector is stored. A memory sector includes one or more memory cells.
As illustrated in
FIG. 1
, a memory array
100
includes a set of memory sectors
102
, y-decoders
110
,
112
,
114
,
116
, x-decoders
120
,
122
, and peripheral circuits
130
,
132
,
134
. The memory sectors
102
are arranged in regular geometric patterns comprising rows and columns. The memory sectors
102
are of uniform physical dimensions and each hold the same amount of data.
BRIEF SUMMARY
The physical layout of a semiconductor memory device having memory sectors of varying sizes can be arranged such that the larger and smaller memory sectors are addressed by x-decoders and y-decoders via word lines and bit lines, respectively. The smaller memory sectors are laid out such that at least some of the small memory sectors are connected with a y-decoder or multiple y-decoders via different bit-lines. Such a bit-line can connect with smaller and larger memory sectors to a y-decoder. The smaller memory sectors are interspersed with the large memory sectors and an area near a corner of the memory device that can be used for other components such as peripheral devices. Optional physical to logical mapping of address allow the smaller memory sectors to be addressed in the first or the last memory addresses.


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