Photomask management method and photomask wash limit...

Details Photomask management method and photomask wash limit... Photomask management method and photomask wash limit...

2011-05-10

2011-05-10

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Design of semiconductor mask or reticle

C716S054000, C716S055000, C702S155000, C382S144000, C700S121000

Reexamination Certificate

active

07941767

ABSTRACT:
A photomask is washed and at least one physical amount of transmittance and phase difference of the photomask, dimension of a pattern, height of the pattern and a sidewall shape of the pattern is measured. After this, the two-dimensional shape of a borderline pattern previously determined for the photomask is measured. Lithography tolerance is derived by performing a lithography simulation for the measured two-dimensional shape by use of the measured physical amount. Then, whether the photomask can be used or not is determined based on the derived lithography tolerance.

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Machine Translated English Translation of Japanese Patent No. JP 3425414.
Machine Translated English Translation of Japanese Application No. 2007-78712.
Notification of Reasons for Rejection issued by the Japanese Patent Office on Aug. 11, 2009, for Japanese Patent Application No. 2007-121027, and English-language translation thereof.

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