Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation
Reexamination Certificate
2003-02-28
2004-06-15
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Electromagnetic or particle radiation
C257S459000, C257S463000, C257S465000
Reexamination Certificate
active
06750523
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to photodiodes stacks and the method of manufacturing the same.
Photodiodes are devices that convert light to electricity. When light shines on a photodiode, it produces current at a voltage, which may be used to supply the power to operate a device or a circuit. The shape of the current versus voltage curve for a specific photodiode is largely determined by the material(s) used in its fabrication. One of the many uses of photodiodes is digital imaging devices.
Digital imaging devices are becoming increasingly popular in a variety of applications such as digital cameras, fingerprint recognition, communications systems, digital scanners and copiers and isolation applications. In recent years, many low cost photodiode CMOS image sensor applications have the active photodiode CMOS image sensor replaced the charge coupled device (CCD). This is because the active photodiode CMOS sensor provides characteristics such as high quantum efficiency, low read noise, high dynamic range and random access. In addition, it is highly compatible with CMOS device fabrication process. Therefore, other control circuits, analog-to-digital circuits (A/D converter), and digital signal processing circuits can be integrated with the CMOS image sensor on the same chip.
The challenge of cost reduction implies a drive for minimizing the number of process steps, especially a minimum number of photo-mask steps, and the application of standardized process conditions wherever possible. These constraints should be kept in mind when additional process steps or new process conditions are proposed to reduce Photodiodes dark current and improve light sensitivity and responsivity without sacrificing any desirable device characteristics. An urgent need has, therefore, arisen for a coherent, low-cost method of reducing dark current in photodiodes fabricated by CMOS technology, and, simultaneously, improve the degree of component integration at the pixel level. The device structure should further provide excellent light responsivity and sensitivity in the red as well as the blue spectrum, mechanical stability and high reliability. The fabrication method should be simple, yet flexible enough for different semiconductor product families and a wide spectrum of design and process variations. Preferably, these innovations should be accomplished without extending production cycle time, and using the installed equipment, so that no investment in new manufacturing machines is needed.
Additionally increasing the voltage output of a photodiode has been a goal of the prior art. For example U.S. Pat. No. 6,504,142 discloses: “Light sensors having a wide dynamic range are used in a variety of applications. A wide dynamic range light sensor includes an exposed Photodiodes light transducer accumulating charge in proportion to light incident over an integration period. Sensor logic determines a light integration period prior to the beginning of integration and the charge is reset. Charge accumulated by the exposed light transducer over the light integration period is measured and a pulse having a width based on the accumulated charge is determined.”
The operations of photodiodes can be understood from U.S. Pat. No. 6,501,165 which discloses: “An image sensor comprising a first conductive layer, which is part of a circuitry of an integrated circuit device. A light sensing device is disposed vertically atop the first conductive layer and the circuitry. The first conductive layer is coupled to one electrical side of the light sensing device. A second conductive layer is disposed above the light sensing device and coupled to an opposite electrical side of the light sensing device. The second conductive layer is coupled to provide a circuit coupling for the circuitry when the light sensing device conducts.”
A prior art method of manufacturing is disclosed in U.S. Pat. No. 6,351,002 which states: “This invention provides a photodiodes comprising a first conductive type doped substrate, a second conductive type heavily doped region, a dummy isolation layer, a first conductive type heavily doped region and an isolation layer. The second conductive type heavily doped region is located in the first conductive doped substrate of which the doping concentration is lower than that of the second conductive type heavily doped region. The dummy isolation layer is formed at the peripheral of the second conductive type heavily doped region. The first conductive type heavily doped region is located at the peripheral of the dummy isolation layer in the first conductive doped substrate. Dopant concentration in the first conductive type heavily doped region is higher than that of the first conductive type doped substrate. The isolation layer is located at the peripheral of the first conductive heavily doped region of which the width is significantly larger than that of the dummy isolation layer.”
All three of the above identified patents are incorporated herein by reference.
SUMMARY OF INVENTION
If a voltage is required that is greater than the voltage available from a single photodiode, a number of them may be connected in a series in a “stack” to produce a greater voltage.
A number of materials, including semiconductors such as silicon, or even organic materials may be used to manufacture photodiodes. Silicon is often used because circuits containing other devices such as transistors, resistors, and capacitors may be fabricated simultaneously with photodiodes in the same silicon substrate.
The fabrication of a “stack” of silicon photodiodes requires either:
A. Series Connected Photodiodes:
Each photodiode is fabricated such that it can be connected in series with one or more other photodiodes, but each photodiode is not electrically isolated from every other photodiode by a layer of dielectric.
B. Isolated Photodiodes:
Each photodiode is electrically isolated from every other photodiode by a layer of dielectric, with an interconnection present between photodiodes to connect them in series.
Described herein are techniques that may be used to realize a photodiode stack using both of the two approaches listed above for supplying the input power to drive photovoltaic relays and image sensors.
A. Series Connected Photodiodes
1. The first of these techniques uses two layers of silicon that have been doped to produce regions having alternating conductivity types. These regions of alternating conductivity type may be stripes, concentric circles, or any other geometry. The top view of this photodiode stack is shown in
FIG. 1
a
, and the cross section of the configuration is shown in
FIG. 1
b
. This cross section is taken through a set of parallel strips that are bounded below, and on all sides by electrically insulating dielectric layers. As shown in
FIG. 1
b
, every other pn-junction has a short circuit present, resulting in the equivalent electronic circuit shown in FIG.
2
. The regions of the photodiode string that are shown in the cross section of
FIG. 1
a
may be obtained by the process sequence shown in FIG.
3
. (The steps required to provide dielectric isolation around the entire diode string are not shown, but may be realized using techniques that are well known in the art.)
2. The second of these techniques uses nested regions of silicon having alternating conductivity type to produce the diode stack. A top view of one version of this structure is shown in
FIG. 4
a
and a cross section is shown in
FIG. 5
b
. The equivalent circuit is shown in
FIG. 5
c
. This structure is fabricated by introducing dopant into a layer of silicon that is (or will be) dielectrically isolated. Another version of this structure is shown in FIG.
6
. In this version, the alternate p-type and n-type regions are formed in a silicon wafer without the use of a dielectric layer beneath the structure, while
FIG. 7
shows the cross section and
FIG. 9
the equivalent circuit. The use of a wafer without the presence of an underlying dielectric layer reduces the cost of the starting wafer for this version.
The top view of a th
Naos Convergent Technology, Inc.
Ngo Ngan V.
Robinson Richard K.
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