Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation
Patent
1998-01-29
1999-11-30
Tran, Minh Loan
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Electromagnetic or particle radiation
257461, 257466, 257594, H01L 3100
Patent
active
059947519
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a photodiode, and a method for its fabrication, which can be fabricated in an integrated circuit and which has a reduced series resistance.
2. Description of the Prior Art
In various integrated circuit arrangements, e.g. in optocouplers and electronic relays, photodiodes are employed as integrated energy and signal sources. For this application, the photodiodes are to have a high off-load voltage, a high short-circuit current and a maximum power output. The power provided by the photodiode does depend on the internal resistance of the photodiode. The internal resistance is formed by the series resistance which results from the sheet resistances of the diffusion zones of the photodiode, the contact resistances of the metallic coatings of the photodiode, and the conduction resistances of the metallic coatings (see, e.g., S. M. Sze, "Physics of Semiconductor Devices", Wiley, New York, Ch. 14.3.2).
Photodiodes which are fabricated as individual components are provided, in order to reduce the series resistance and to increase the photon yield, with back contacts and special geometries to reflect the light; e.g., V trench patterns (see, e.g., S. M. Sze "Physics of Semiconductor Devices", Wiley, New York, Ch. 14.3.4).
Photodiodes which are fabricated in a state integrated in a substrate cannot be provided with back contacts or reflection patterns. Photodiodes which are integrated in a substrate have a p-n junction near the top of the component, which separates the electrons and holes generated in the silicon by photons. The p-doped and n-doped zones are electrically connected in this arrangement via narrow, highly doped n-doped and p-doped strips, respectively. The highly doped strips have a high internal resistance. The sheet resistance of the conduction is reduced by means of a metallization layer which has contacts over the entire length of the highly doped strips. At the same time, part of the photosensitive area of the photodiode is covered, so that the photon yield is reduced.
SUMMARY OF THE INVENTION
The photodiode according to the present invention is integrated in a substrate and is insulated with respect to the substrate by dielectric insulation. To this end, the substrate includes a carrier chip, an insulating layer disposed thereon, and a monocrystalline silicon layer disposed on the insulating layer thereon. Provisions are made, in the monocrystalline silicon layer, for a trench which extends from a principal face of the silicon layer to as far as the insulating layer. The trench is filled, e.g., with SiO.sub.2 or is lined with SiO.sub.2 and filled with polysilicon. The trench completely surrounds an active zone in the silicon layer. Downwards, the active zone is insulated from the carrier chip by the insulating layer.
In the active zone, a first doped zone is provided for which directly adjoins the trench. The first doped zone extends from the principal face of the silicon layer to as far as the insulating layer. The first doped zone is doped to a first conductivity type, e.g., p-doped. Preferably, the first doped zone, at the interface with the trench, has a dopant concentration in the range between 10.sup.18 cm.sup.-3 and 10.sup.20 cm.sup.-3 in conjunction with a penetration depth of e.g. 3 .mu.m.
Also provided for in the active zone is a second doped zone which is doped to a second conductivity type opposite to the first, e.g., n-doped. The second doped zone, together with the first doped zone, forms a p-n junction which constitutes the photodiode.
Disposed on the principal face of the silicon layer are contacts for both the first doped zone and the second doped zone. With a view to as low a connection resistance as possible, these contacts are preferably located on connection zones of elevated dopant concentration.
Since the first doped zone extends from the principal face to as far as the insulating layer, the area of the p-n junction effective for the photodiode is enlarged with respect to the area requi
REFERENCES:
patent: 4157926 (1979-06-01), Schoolar
patent: 4733286 (1988-03-01), Matsumoto
patent: 5360987 (1994-11-01), Shibib
Appl. Phys. Lett. 37(11), Dec. 1, 1980--A High-speed Si Lateral Photodetector Fabricated over and Etched Interdigital Mesa, pp. 1014-1016, Chen et al.
IEEE Transactions on Electron Devices, vol. Ed-26, No. 7, Jul. 1979 pp. 1091-1097, "The V-Groove Multijunction Solar Cell", Chappell.
Siemens Aktiengesellschaft
Tran Minh Loan
LandOfFree
Photodiode having reduced series resistance, and method for fabr does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Photodiode having reduced series resistance, and method for fabr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Photodiode having reduced series resistance, and method for fabr will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1676055