Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2002-10-16
2004-03-16
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S081000, C257S233000, C257S292000
Reexamination Certificate
active
06706550
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a pinned photodiode of an image sensor and a method for manufacturing the same; and, more particularly, to a pinned photodiode of an image sensor fabricated by CMOS processes (hereinafter, referred to as a “CMOS image sensor”) and the manufacturing method thereof.
DESCRIPTION OF THE PRIOR ART
As well-known to those skilled in the art, the pinned photodiode (PPD) has been widely used as an element to produce and integrate photoelectric charges generated in CCD or CMOS image sensors sensing light from an object and also it would be called “buried photodiode” since it has PNP (or NPN) junction structure which is buried in a substrate. As compared with the photodiode having other structures such as source/drain PN junction structure and MOS capacitor structure, etc., the PPD has various merits. One of them is that it is possible to increase the depletion depth to bring about high quantum efficiency in converting incident photons into electric charges. That is, in the PPD having the PNP junction structure, the N-type region therein is fully depleted and also the depletion region is extended to both the P-type regions with the increase of the depletion depth. Accordingly, this vertical extension of the depletion depth may increase quantum efficiency, thereby making an excellent light sensitivity.
In the meanwhile, in the case of the PNP junction PPD employed in CMOS image sensors using a power supply voltage of less than 5V or 3.3V, two P regions have to have the same potential in less than the power supply voltage (e.g., 1.2V to 2.8V) in order for the N region to be fully depleted, thereby increasing the quantum efficiency. This technology is disclosed in U.S. patent application Ser. No. 09/258,307, entitled “CMOS Image Sensor with Equivalent Potential Diode” filed on Feb. 26, 1999, which was assigned to “Hyundai Electronics Industries Co., Ltd.”
FIG.
1
. shows the low power PPD disclosed in U.S. patent application Ser. No. 09/258,307. As shown in
FIG. 1
, the PPD has a PNP structure where an N
−
doping region
102
and a P
0
doping region
101
are formed in a P-epi (epitaxial) layer. At this time, an N
−
ion implantation mask for forming the deep N
−
and a P
0
ion implantation mask for P
0
are used and they are different from each other in their pattern width. That is, the open area for the P
0
doping region
101
is larger than that for the N
−
doping region
102
. By bring the P-epi layer into contact with the P
0
doping region
101
so that the P-epi layer and the P
0
doping region
101
have the same voltage in low voltage, this PPD can safely carry out a full depletion layer in the N
−
doping region even in low voltage of less than 3.3V.
The above PPD in
FIG. 1
makes it possible the full depletion in low voltage and has an effect on, to some extent, improving the quantum efficiency. Further, it is possible to increase the depletion depth by using the P-epi layer. However, there is a problem that it is not possible to obtain so much sufficient depletion depth of the N
−
doping region as high light sensitivity even if a desired quantum efficiency may be obtained.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a pinned photodiode having a increased depletion depth in comparison with the prior art and the manufacturing method thereof.
It is, therefore, another object of the present invention to provide a pinned photodiode to increase the constant charge capacity and the manufacturing method thereof.
In accordance with an aspect of the present invention, there is provided a pinned photodiode in an image sensor comprising: a semiconductor layer of a first conductive type; a first doping region of a second conductive type formed in the semiconductor layer, wherein the first doping region includes at least two multi-implantation layers which are formed by different ion acceleration energy and wherein the first doping region is apart from a field oxide layer to isolate adjacent other photodiodes; and a second doping region of the first conductive type formed between the first doping region and a surface of the semiconductor layer, wherein an area of the second doping region has larger than that of the first doping region, whereby a thickness between the first doping region and the surface of the semiconductor layer is made thin by the multi-implantation layers.
In accordance with another aspect of the present invention, there is provided a pinned photodiode in an image sensor comprising: a semiconductor layer of a first conductive type; and at least two first doping regions of a second conductive type alternatively formed in the semiconductor layer and connected to each other at edges thereof so that the first doping regions have the same potential, whereby a plurality of PN junctions are formed in the semiconductor layer and the PN junctions improves capturing capacity of photoelectric charges generated in the photodiode.
In accordance with further another aspect of the present invention, there is provided a method for forming a pinned photodiode in an image sensor, the method comprising the steps of: a semiconductor layer of a first conductive type; forming a filed oxide layer to isolate an active region from a field region; forming a first ion implantation mask of which an edge covers a portion of the active region adjacent to the field region, opening the active region; forming a first doping region through two ion implantation processes with different ion implantation energy; removing the first ion implantation mask; forming a second ion implantation mask of which an edge is arranged at a boundary between the field and active regions, opening the active region; and forming a second doping region between a surface of the semiconductor layer and the first doping region, whereby a thickness between the first doping region and the surface of the semiconductor layer is made thin by the two ion implantation processes.
In accordance with still another aspect of the present invention, there is provided a method for forming a pinned photodiode in an image sensor, the method comprising the steps of: a semiconductor layer of a first conductive type; forming a filed oxide layer to isolate an active region from a field region; patterning a gate of a transfer transistor to transfer photoelectric charges generated in the photodiode; forming a fist doping region of a second conductive type in the active region using a first ion implantation mask which covers a portion of the active region adjacent to the field region and opens an edge of the transfer transistor; forming a second doping region of the first conductive type on the first doping region using a second ion implantation mask which covers the transfer transistor; forming a third doping region of the second conductive type on the second doping region using a third ion implantation mask which covers the portion of the active region adjacent to the field region and opens an edge of the transfer transistor, wherein the first and third doping regions are connected to each other at edges thereof so that the first and third doping regions have the same potential; and forming a fourth doping region of the first conductive region on the third doping region using a fourth ion implantation mask opens the active region.
In accordance with still another aspect of the present invention, there is provided a method for forming a pinned photodiode in an image sensor, the method comprising the steps of: a semiconductor layer of a first conductive type; and alternatively forming N-type impurity regions and P-type impurity region using a first and second ion implantation masks, wherein the first ion implantation mask covers a portion of the active region adjacent to the field region and opens an edge of the transfer transistor and wherein the second ion implantation mask covers the transfer transistor.
REFERENCES:
patent: 4984047 (1991-01-01), Stevens
patent: 5051797 (1991-09-01), Erhardt
patent: 5841159 (
Cha Myung Hwan
Lee Ju Il
Lee Nan Yi
Hyundai Electronics Industries Co, Ltd.
Niebling John F.
Simkovic Viktor
Townsend and Townsend / and Crew LLP
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