Photo-sensor

Details Photo-sensor Photo-sensor

1999-11-24

2002-02-26

Le, Que T. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C250S208100

Reexamination Certificate

active

06350981

ABSTRACT:

BAKCROUND OF THE INVENTION
The present invention relates to photo-sensors and more particularly, to photo-sensors effectively applied to cameras and the like.
The auto-focusing (AF) systems of cameras are roughly classified into two types, i.e., passive and active types. In the former type, the scene to be picked up is passed through two lenses (or separator lenses) to obtain two images for sensing with respective sensors, and distance measurement is performed from the distance between the two sensed images. In the latter type, a light beam is projected from an LED in a camera body or the like onto the scene, and distance measurement is performed by detecting the position of the reflected light beam. The former type systems have a problem that the accuracy of the distance measurement is reduced when the contrast of the scene is low. The latter type systems have a problem that it is impossible to detect the light projected form the LED when the background of the scene is bright. Both type systems thus have their own merits and demerits.
In the presence of these problems, Japanese Patent Laid-Open No. 64-18255 discloses a line sensor for the active AF system which permits expanding the imaging scene capable of AF by removing background light.
FIG. 9
shows the construction of one pixel of the disclosed line sensor, and
FIG. 10
outlines an active AF module.
Referring to
FIG. 9
, a photo-sensor cell
101
is shown, which includes a MOS transistor FT
6
and a p-channel and an n-channel MOS transistor FT
10
and FT
11
. The MOS transistor FT
6
has its drain D
6
connected to the drain D
10
of the MOS transistor FT
10
. The MOS transistor FT
10
has its source S
10
held at a reference potential V
ref
and its gate G
10
connected to one terminal of a capacitor
107
as shown. The MOS transistor FT
11
is connected to the drain D
6
of the MOS transistor FT
6
as shown. The MOS transistor FT
11
serves to turn on and off the gate G
10
and the drain D
10
of the MOS transistor FT
10
according to a switching signal SW applied to its gate G
11
. In the application of a solid-state imager having the photo-sensor cell
101
to a light-receiving element
124
as shown in
FIG. 10
, before the measurement of the distance of a scene
122
the charge corresponding to photo-current I
SHO
, which is generated in a photo-diode
102
by the light other than the signal light, i.e., background light, is stored in the capacitor
107
.
As shown in
FIG. 9
, the photo-diode
102
is connected to one terminal of a MOS transistor FT
0
having the other terminal connected to one terminal of a switching transistor T
1
. The switching transistor FT
1
is connected to one terminal of a capacitor
105
, and its switching operation is brought about with a data accumulation signal DT applied to its gate G
1
. The capacitor
105
is connected to a switching element FT
3
, and its terminal voltage V
0
is initialized to the reference potential V
ref
by turning on the switching element FT
3
with a reset signal RST applied to the gate G
3
of the element FT
3
. In the circuit construction shown in
FIG. 9
, transistors FT
4
and FT
5
, a constant current source
103
including transistors FT
7
and FT
8
and the capacitor
105
constitutes a circuit for outputting the signal detected by the above circuit construction. That is, an output corresponding to the terminal voltage V
0
across the capacitor
105
is outputted to a video line
104
in a manner as will be described hereinunder.
For storing background light in the above circuit, prior to the distance measurement the photo-diode
102
and the capacitor
105
are held disconnected from each other without supplying the data accumulation signal DT to the gate G
1
of the switching transistor FT
1
. Also, the terminal voltage V
0
across the capacitor
105
is initialized to the reference potential V
ref
by applying the reset signal RST to the gate G
3
of the switching transistor FT
3
as noted above. Furthermore, the light source
120
, i.e., the LED, is not driven, so that no signal light is incident on the photo-diode
102
but the sole background light is incident on the light-receiving element
124
. Still further, the switching signal SW is held to be at a high level to hold the MOS transistor FT
11
“ON”. In this state, the MOS transistor FT
10
functions as a load having a predetermined resistance, and the photo-current I
SHO
generated in the photo-diode
102
by the background light, is supplied from the reference potential V
ref
to flow through the MOS transistor FT
10
and the transistor FT
6
into the photo-diode
102
.
As stated before, the photo-diode
102
and the capacitor
105
are held disconnected at this time. Thus, the flow of the photo-current I
SHO
due to the background light causes the terminal voltage across the capacitor
107
to become lower than the reference potential V
ref
in correspondence to the resistance of the MOS transistor FT
10
functioning as the load. In other words, the charge corresponding to the photo-current I
SHO
due to the background light is accumulated in the capacitor
107
.
As the charge is accumulated in the capacitor
107
, it is eventually saturated. Thus, the saturated accumulation charge caused by the photo-current I
SHO
due to the background light can be stored in the capacitor
107
. That is, the photo-current I
SHO
can be stored as the voltage at the gate G
10
of the MOS transistor FT
10
.
In this state, signal accumulation of pixel data as signal light in the capacitor
105
can be started. Specifically, at this time the light source
120
is driven to let signal light be incident on the light-receiving element
124
, i.e., the photo-diode
102
, while at the same time the data accumulation signal DT is applied to the gate G
1
of the switching transistor FT
1
to turn on this transistor and connect the capacitor
105
and the photo-diode
102
to each other.
Although background light is incident on the photo-diode
102
at this time in superimposition on the signal light, since the photo-current I
SH0
due to the background light flows on the basis of the voltage stored at the gate G
10
of the MOS transistor FT
10
, only photo-current I
SH
′ due to the signal light flows from the capacitor
105
to the photo-diode
102
.
Thus, the terminal voltage V
0
across the capacitor
105
is reduced from the initial level V
ref
according to the sole photo-current I
SH
′ due to the signal light. It is thus possible to obtain a voltage change corresponding to the sole signal light intensity, that is, detect a signal free from the influence of the background light.
By turning on the switching element FT
5
, which is connected to the transistor FT
4
and the current amplifier constituted by the constant current source
103
including the transistors FT
7
and FT
8
, i.e., a source follower, the accumulated terminal voltage V0 across the capacitor
105
is read out through the switching element FT
5
to a video line
104
.
Photo-sensor cells as described above are arranged one- or two-dimensionally to form a line or an area sensor. The line sensor described in the disclosure noted above is summarized as follows. The MOS transistors FT
10
and FT
11
and the capacitor
107
constitute a current memory to store photo-current ISHO due to background light. In addition, the switching transistor FT
1
, the transistor FT
3
and the capacitor
105
constitute a photo-current sensor for sensing signal light. Thus, the sole photo-charge corresponding to the light projected from the light source is accumulated and read out to reduce the adverse effects of the background light.
The line sensor shown in
FIG. 9
, however, has the following drawback. Denoting the voltage applied to the gate of the MOS transistor FT
6
by V
G
, the gate-source voltage across this transistor by V
GS6
and the gate-source voltage across the MOS transistor FT
0
by V
GSO
, when the data accumulation signal DT is “OFF”, that is, when storing the background light in the capacitor
107
, the terminal voltage V
PD
across

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