Photo mask set for forming multi-layered interconnection...

Details Photo mask set for forming multi-layered interconnection... Photo mask set for forming multi-layered interconnection...

2007-09-18

2007-09-18

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S211000, C257S773000

Reexamination Certificate

active

10685655

ABSTRACT:
A photo mask set for forming multi-layered interconnection lines and a semiconductor device fabricated using the same includes a first photo mask for forming lower interconnection lines and a second photo mask for forming upper interconnection lines. The first and second photo masks have lower opaque patterns parallel with each other and upper opaque patterns that overlap the lower opaque patterns. In this case, ends of the lower opaque patterns are located on a straight line that crosses the lower opaque patterns. As a result, when upper interconnection lines are formed using the second photo mask, poor photo resist patterns can be prevented from being formed despite the focusing of reflected light.

REFERENCES:
patent: 5242770 (1993-09-01), Chen et al.
patent: 5922495 (1999-07-01), Kim
patent: 6261883 (2001-07-01), Koubuchi et al.
patent: 2001/0017418 (2001-08-01), Noguchi et al.

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