Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Reexamination Certificate
2000-04-28
2003-04-22
Kim, Robert H. (Department: 2882)
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
C250S208100, C250S214100
Reexamination Certificate
active
06552325
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
This invention relates to a photo diode array; and more particularly, to such photo diode array having improved linearity.
2. Description of the Prior Art
A photo diode is formed, for example, by providing a PN junction with a p-type region on the light receiving surface side and an n-type region on the substrate side. A current generated by light applied to the photosensitive area flows from a cathode to an anode.
FIG. 1
is a sectional view of an exemplary conventional photo diode, wherein a p-type diffused region
2
is formed on one side of n-type layer
1
which is a substrate; n-contact
5
is formed on the opposite side of n-type layer
1
; and passivation layer
3
is formed on the light receiving surface side, where p-type diffused region
2
is formed. A p-contact
4
, connected to p-type diffused region
2
, is formed by removing part of passivation layer
3
using an etching process, or the like.
The photo diode of
FIG. 1
is operated as follows. Electrons, generated in the photo diode, by application of input light
100
to the photo sensitive area, are accumulated in n-type layer
1
, while holes are accumulated in p-type diffused region
2
. Accordingly, n-type layer
1
is negatively charged and p-type diffused region
2
is positively charged. Thus, when an external circuit is connected between p-type diffused region
2
and n-type layer
1
, electrons and holes flow toward opposite layers from n-type layer
1
and p-type diffused region
2
, respectively.
For example, an electron generated in p-type diffused region
2
, shown as “EL01” in
FIG. 1
is accelerated towards n-type layer
1
by the electric field in the photo diode and accumulated there. In a similar manner, a hole generated in n-type layer
1
, shown as “HL01”, is accelerated towards p-type diffused region
2
and accumulated there. A photo diode array may comprise a plurality of such photo diodes arranged in an array.
FIG. 2
shows an example of a configuration of a plurality of photo diodes arranged in an array, wherein a plurality of photo diodes
6
a-
6
e
are arranged in the array on a substrate (not shown, for sake of convenience, but understood to be present. Same comments apply with the remainder of the drawing, namely,
FIGS. 3-5
) so that the photo sensitive areas thereof are oriented in a particular direction and electrodes
7
a-
7
e
are connected to one end of the photo sensitive area of each photo diode
6
a-
6
e
, respectively.
Operation of the
FIG. 2
array is as follows. When light is made incident to the photo sensitive area of photo diodes
6
a-
6
e,
currents are generated between each light receiving surface side and each opposite side. The currents are outputted to the outside via electrodes
7
a-
7
e,
respectively. For example, holes generated in photo diodes
6
a-
6
e
are outputted via electrodes
7
a-
7
e.
However, disadvantageously, in conventional arrays, current values outputted thereby may vary according to the location on the photo sensitive area at which the input light is applied. For example, when the input light is made incident to a portion-marked “P001”, the distance from that spot to electrode
7
e
is longer than when the input light is made incident to the portion marked “P002”. This causes a voltage drop due to the resistance that exists between the respective portions and the electrode. Hence, the current value which is outputted can vary. In other words, a problem exists in that in the prior art, linearity deteriorates depending on the location on the light sensitive area at which the input light is made incident. Specifically, when a high current is generated by the light being made incident to the spot marked “P001”, linearity deterioration increases, as compared to the light being made incident to spot “P002”,because the generated voltage drop increases further.
In order to reduce this linearity deterioration, a bias voltage which forms a reverse bias is generally applied to the photo diode. However, although this technique may improve frequency response and some amount of the linearity, in such a case, there is still the problem that this causes an increase in dark current which increases noise, and increases danger of destruction of the photo diode.
SUMMARY OF THE INVENTION
Accordingly, an object of the invention is to overcome the foregoing and other deficiencies and disadvantages of the prior art.
Another object is to realize a photo diode array wherein linearity is greatly improved.
REFERENCES:
patent: 5254848 (1993-10-01), Kashimura
patent: 5397920 (1995-03-01), Tran
patent: 5446493 (1995-08-01), Endo et al.
Akasaka Yasukazu
Fujita Tadashige
Kobayashi Shinji
Komiyama Makoto
Miura Akira
Kojima Moonray
Thomas Courtney
Yokogawa Electric Corporation
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