Phaselock threshold correction

Details Phaselock threshold correction Phaselock threshold correction

1998-06-30

2001-05-08

Chin, Stephen (Department: 2734)

Pulse or digital communications

Receivers

Interference or noise reduction

C375S345000

Reexamination Certificate

active

06229858

ABSTRACT:

This invention relates to communication receivers and more particularly to syncronization of a digital receiver with a transmitter prior to data transmission.
BACKGROUND OF THE INVENTION
A basic radio communication system comprises, at a minimum, a transmitter and a receiver. The transmitter and receiver are interconnected by a radio frequency channel to permit transmission of an information signal therebetween. A digital receiver in a communication system will generally include an amplifier with a gain adjusted by a control signal. The process of adjusting the gain of an amplifier based on the received signal using a control signal is well-known as Automatic Gain Control (AGC).
Before data can be relayed from the transmitter to the receiver, the receiver or modem has to achieve synchronization with the transmitter. Prior to synchronization of the receiver with the frequency, phase and time variables of the received signal, the amplitude of the received signal at the receiver must first be determined. An automatic gain control circuit or algorithm sets the amplifier gain for optimum signal detection processing. If the amplifier gain is too low, then internal receiver noise may dominate and signal detection will be degraded. If the amplifier gain is too high, the analog circuit components of the receiver will saturate, causing nonlinearities, which also degrade performance. It is only after the gain levels have been correctly established that the receiver functions to estimate the other synchronization variables—that is, the frequency, phase and time variables. Synchronization of these variables is required before the receiver begins data demodulation and other signal processing functions.
In one prior art communications system utilizing quadrature modulation, a pilot carrier signal is transmitted in order to facilitate reception and decoding of transmitted information. This pilot signal is utilized for both amplitude and phase correction. Selective fading that occurs on a transmission path results in problems when attempting to use the pilot carrier signal. Where digital information is to be received in a synchronous manner, channel fading and noise can prevent the maintenance of synchronization.
Thus, there is a need for a communications system receiver operating at a specified probability of acquisition independent of the signal plus noise power calculation of the AGC circuit of the receiver.
The present invention relates to the synchronization of a receiver with a transmitter and, in particular to the correction of the threshold used for phaselock status in a digital receiver or modem. The receiver operates at a specified minimum probability of signal acquisition independent of the signal to noise power calculation of the Automatic Gain Control (AGC) circuit.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a noise estimator for threshold correction of phaselock in a receiver where a noise estimating circuit provides threshold correction of phaselock as a function of input noise power to mitigate a bias introduced by the AGC circuit at the output of a quadrature phase detector. The noise power estimator of the present invention utilizes the ergodic properties of the input signal and time averaging to arrive at a statistical average of input signal envelope. This time average of the input signal is subtracted from the instantaneous value of the detected envelope and the computed instantaneous error resulting from this subtraction is squared and time-averaged, resulting in an estimate of the input noise power.
In accordance with the present invention, there is provided a noise estimator for computing the noise estimate of an input signal where the input signal comprises a signal component and a noise component. The estimator circuit includes a filter for removing wideband noise from the input signal. Further, the noise estimator of the present invention includes a square-law power detector responsive to the output of the low pass filter and an envelope detector coupled to the output of the square-law power detector. A time-averaged envelope of the input signal is output from a low pass filter performing time averaging, and this output is applied to a subtractor that also receives the instantaneous value of the input envelope to generate an instantaneous error signal. This instantaneous error signal is squared and applied to a low pass filter that also performs time averaging. The resultant signal from the time averaging function is a noise estimate on the input signal. This noise estimate is then utilized for threshold correction for phaselock of a receiver to a transmitter.


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