Phaselock receiver with phaselock detector

Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation

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Details

329124, 331 4, 455265, H04B 116

Patent

active

042130964

ABSTRACT:
A phaselock loop in a phaselock receiver includes a voltage-controlled oscillator, and a main phase detector receptive to an output of the oscillator and a received signal. Means to detect when the oscillator is phase locked with the received signal includes a quadrature phase detector receptive to a quadrature-phase-shifted oscillation from the oscillator and the received signal. Means are provided to subtract the direct-current component of the output of the main phase detector from the direct-current component of the output of the quadrature phase detector to provide a phaselock-indicating signal which is substantially zero when the oscillator is out-of-lock with the received signal, and which is high when the oscillator is in-lock with the received signal.

REFERENCES:
patent: 2833923 (1958-05-01), Gruen
patent: 3160815 (1964-12-01), Ford et al.
patent: 3290611 (1966-12-01), Horlacher et al.
patent: 3311442 (1967-03-01), De Jager et al.
patent: 3768030 (1973-10-01), Brown et al.
patent: 3940695 (1976-02-01), Sickles
patent: 4004231 (1977-01-01), Elshuber

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