Phased lock loop synchronous detecting system with an automatic

Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation

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455265, 329 50, 329124, H04B 116

Patent

active

047094087

ABSTRACT:
A circuit for processing an intermediate frequency signal comprises a limiter connected to receive the intermediate frequency signal to generate a carrier component of the intermediate frequency signal as an output, a phase locked loop circuit connected to receive one of the intermediate frequency signal and the carrier component from the limiter to generate an output signal which is phase-locked onto the carrier component of the intermediate frequency signal, a synchronous detector for synchronously detecting the intermediate frequency signal depended on the output signal from the phase locked loop circuit, and an automatic frequency circuit connected to receive the carrier component from the limiter and the output signal from the phase locked loop circuit to generate an output signal, as an automatic frequency tuning signal, in response to a frequency difference therebetween.

REFERENCES:
patent: 4091410 (1978-05-01), Citta
patent: 4261016 (1981-04-01), Hongu et al.
patent: 4283792 (1981-08-01), Hongu et al.
patent: 4322751 (1982-03-01), Hongu et al.
patent: 4470145 (1984-09-01), Williams
IEEE Transactions on Consumer Electronics, vol. CE-29, No. 3, 8/1983.

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