Phase synchronization circuit

Details Phase synchronization circuit Phase synchronization circuit

1985-03-28

1987-12-15

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307409, 328 63, 328 72, 328155, H03K 386, H03K 526

Patent

active

047136219

ABSTRACT:
A phase synchronization circuit for controlling a graphic display device in a teletext receiving system. The phase synchronization circuit includes a delay circuit, adapted to delay in sequence clock signals which are to be phase-synchronized with a reference signal and to produce in sequence delayed clock signals, and a selection circuit, including set/reset circuits and gates, each gate receiving the output of the set/reset circuits and of the delayed clock signals. Among the delay clock signals, the signal that has the nearest edge timing to the edge of external signals is selected. The phase synchronization circuit has a short pull-in time and high-speed synchronization, is suitable for circuit integration, and offers improved reliability.

REFERENCES:
patent: 3024417 (1962-03-01), Secretan
patent: 3241075 (1966-03-01), Chatelon
patent: 3502991 (1970-03-01), Sampson
patent: 3624519 (1971-11-01), Beydler
patent: 4023110 (1977-05-01), Oliver
patent: 4061975 (1977-12-01), Sugai
patent: 4386323 (1983-05-01), Jansen

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