Phase shift masking for “double-T” intersecting...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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Reexamination Certificate

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06610449

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to manufacturing small dimension features of objects, such as integrated circuits, using photolithographic masks. More particularly, the present invention relates to the application of phase shift masking to complex layouts for integrated circuits and similar objects.
2. Description of Related Art
Phase shift masking, as described in U.S. Pat. No. 5,858,580, has been applied to create small dimension features in integrated circuits. Typically the features have been limited to selected elements of the design, which have a small, critical dimension. Although manufacturing of small dimension features in integrated circuits has resulted in improved speed and performance, it is desirable to apply phase shift masking more extensively in the manufacturing of such devices. However, the extension of phase shift masking to more complex designs results in a large increase in the complexity of the mask layout problem. For example, when laying out phase shift areas on dense designs, phase conflicts will occur. One type of phase conflict is a location in the layout at which two phase shift regions having the same phase are laid out in proximity to a feature to be exposed by the masks, such as by overlapping of the phase shift regions intended for implementation of adjacent lines in the exposure pattern. If the phase shift regions have the same phase, then they do not result in the optical interference necessary to create the desired effect. Thus, it is necessary to prevent inadvertent layout of phase shift regions in phase conflict.
Another problem with laying out complex designs which rely on small dimension features, arises because of isolated exposed spaces which may have narrow dimension between unexposed regions or lines.
Because of these and other complexities, implementation of a phase shift masking technology for complex designs will require improvements in the approach to the design of phase shift masks, and new phase shift layout techniques.
SUMMARY OF THE INVENTION
The present invention provides techniques for extending the use of phase shift techniques to implementation of masks for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past, including “double-T” features. The invention provides a method that includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and applying sub-resolution assist features within phase shift regions. The present invention is particularly suited to opaque field phase shift masks which are designed for use in combination with binary masks defining interconnect structures and other types of structures that are not defined using phase shifting, necessary for completion of the layout of the layer.
Various aspects of the invention include computer implemented methods for definition of mask layouts for corresponding complex layouts in the layers of integrated circuits to be made using such masks, methods for manufacturing masks having such mask layouts, methods for manufacturing integrated circuits having improved small dimension features implemented using the novel masks, and improved integrated circuits having the improved small dimension features.
The invention includes a method for producing photolithographic masks, and layout files for such photolithographic masks, which comprises identifying features in a pattern to be exposed having a dimension less than a particular feature size, and laying out phase shift regions using a layout rule for the identified features to produce a phase shift mask having phase shift areas. The particular feature size according to the invention need not be the critical dimension for the smallest features to be implemented. Rather, in the layout of an entire complex pattern, any feature which is suitable for implementation using phase shifting can be identified according to the present invention.
In one embodiment, the process of identifying features suitable for implementation using phase shifting includes reading a layout file which identifies features of the complex pattern to be exposed.
In one preferred embodiment, the phase shift mask includes an opaque field, and the phase shift regions include a plurality of transparent regions having a first phase within the opaque field, and a plurality of complementary transparent regions having a second phase 180 degrees out of phase with respect to the first phase, within the opaque field. The opaque field leaves unexposed lines formed by the phase shift regions unconnected to other structures. A complementary mask is laid out for use is conjunction with the opaque field phase shift mask to form interconnect structures in the region blocked by the opaque field, so the features formed using the phase shift mask are integrated with larger dimension features. In one embodiment, the complementary mask is a binary mask, without phase shifting features.
As a result of the layout rule, regions in the phase shift mask may result in phase conflicts. Thus, the invention also includes applying an adjustment to one or more of the phase shift regions in the phase shift mask to correct for phase conflicts. The adjustment in one preferred embodiment comprises dividing a phase shift region having a first phase into a first phase shift region having the first phase in a second phase shift region having the second phase. An opaque feature is added to the phase shift mask between the first and second phase shift regions. The complementary mask includes a corresponding opaque feature preventing exposure of the features to be exposed using the first and second phase shift regions in the phase shift mask, and includes a cut-out over the opaque feature separating the first and second phase shift regions to expose any feature resulting from the phase difference between the first and second phase shift regions. In one embodiment, the unique structure which results from the adjustment is laid out in the first instance to prevent phase conflicts in the layout, and so may not be considered an “adjustment” to correct a phase conflict in the layout.
For example, phase conflicts can arise in the implementation of a pattern consisting of an intersection of an odd number of line segments. The odd number of line segments defines a plurality of corners at the intersection. In this case, phase shift regions are laid out adjacent the line segments on either side of the corner so they have the same phase, and preferably continuing around the corner in all of the plurality of corners, except one. In one excepted corner, a first phase shift region having the first phase is laid out adjacent the line segment on one side of the corner, and a second phase shift region having the second phase is laid out adjacent the line segment on the other side of the corner. An opaque feature is added between the first and second phase shift regions in the one corner. The complementary mask includes a corresponding opaque feature preventing exposure of the intersecting line segments left unexposed by the phase shift mask, and includes a cut-out over the opaque feature separating the first and second phase shift regions to expose any feature resulting from the phase difference in the one excepted corner between the first and second phase shift regions.
The selection of the one excepted corner having the cut-out feature in the structure that defines the intersection of an odd number of line segments is implemented in various embodiments according to design rules. In one design rule, the one excepted corner is the corner defining the largest angle less than 180 degrees. In another design rule, the one excepted corner is the corner which is the greatest distance away from an active region on the integrated circuit.
The present invention also provides for lay

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