Phase shift circuit with lower intrinsic delay

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Phase shift by less than period of input

Reexamination Certificate

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Details

C327S149000, C327S238000, C327S254000

Reexamination Certificate

active

08081023

ABSTRACT:
A phase shift circuit that includes two, rather than four, delay chains and corresponding selectors is described. This provides a significant area savings and reduces the intrinsic delay of the phase shift circuit, which is particularly beneficial for embodiments in which there is no intrinsic delay matching. In one implementation, the phase shift circuit includes a first delay circuit and a matching delay circuit. The first delay circuit provides a first delay that includes a first intrinsic delay and a first intentional delay. The delay matching circuit provides a matching delay that matches the first intrinsic delay. In one implementation, the phase shift circuit also includes a second delay circuit to provide a second delay that includes a second intrinsic delay and second intentional delay, where the second intrinsic delay matches the first intrinsic delay and the second intentional delay is half as long as the first intentional delay.

REFERENCES:
patent: 5661427 (1997-08-01), McBride et al.
patent: 6788119 (2004-09-01), Hyland et al.
patent: 2003/0101376 (2003-05-01), Sanghani
patent: 2005/0114724 (2005-05-01), Wu
patent: 2006/0232314 (2006-10-01), Hatani et al.

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