Phase-offset signal generator

Details Phase-offset signal generator Phase-offset signal generator

1988-12-16

1989-12-05

Laroche, Eugene R.

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

328155, H03L 700

Patent

active

048855545

ABSTRACT:
A device for generating a digitizing pulse for sampling an analog video signal includes a phaes-locked-loop (PLL) circuit and a phase offset circuit. The PLL circuit generates a correction pulse required to bring an output signal of digitizing pulses in phase with a reference horizontal sync signal. The phase offset circuit includes a digital memory which stores a digital number representative of a fraction of a pixel pulse that is desired as phase offset of the digitizing pulse. This fraction is converted into an offset current pulse having a duration equal to the duration of a pixel pulse and an amplitude that is the fraction of a maximum amplitude. The offset current is added to the PLL correction current for generating an output signal of digitizing pulses having the desired phase offset relative to the pixel pulses.

REFERENCES:
patent: 4330717 (1982-05-01), Coleman
patent: 4626796 (1986-12-01), Elder
patent: 4716363 (1987-12-01), Dukes et al.
patent: 4819196 (1989-04-01), Lilley et al.

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