Phase-locked oscillator with improved digital integrator

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

Reexamination Certificate

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C331S00100A, C331S016000, C331S023000, C331S025000, C327S156000, C327S159000

Reexamination Certificate

active

06771133

ABSTRACT:

STATEMENT RE FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable
REFERENCE TO SEQUENCE LISTING
Not Applicable
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates generally to digital integrators and phase-locked oscillators. More particularly, the present invention pertains to digital integrators with digital lead compensators, and to phase-locked oscillators with digital integrators that include digital lead compensators.
DESCRIPTION OF THE RELATED ART
Phase-locked oscillators are used in transmitters for producing an output frequency that is crystal referenced, for demodulating frequency-modulated signals in radio receivers, to achieve frequency-deviation compression in frequency-modulated and phase-modulated receivers, and in various devices in which both rapid change to selected frequencies and precise frequency control are critical.
The use of phase-locked oscillators, including use thereof to achieve frequency-deviation compression in radio receivers, is taught by Lautzenhiser in U.S. Pat. No. 5,091,706, issued Feb. 25, 1992; in U.S. Pat. No. 5,497,509, issued Mar. 5, 1996; and in U.S. Pat. No. 5,802,462, issued Sep. 1, 1998.
Phase-locked oscillators can be ac modulated, dc modulated, or both, as taught by Lautzenhiser in U.S. Pat. No. 5,091,706; in U.S. Pat. No. 5,097,230, issued Mar. 17, 1992; and in U.S. Pat. No. 5,311,152, issued May 10, 1994. In addition, phase-locked oscillators can be ac and/or dc modulated using principles taught in the aforesaid Lautzenhiser patents.
In phase-locked oscillators, both a forward path and a feedback path are connected to a crystal-controlled reference oscillator by a comparing device. Phase lock is achieved when a feedback frequency from a voltage-controlled oscillator equals the frequency of the reference oscillator.
Channelization of phase-locked oscillators is achieved by dividing frequencies in the feedback path by N, as shown herein, by any of the ways taught by Lautzenhiser in the aforesaid patents, by partial N manipulation, or by nearly any other method that is conceivable.
Since channelization of the feedback path is dependent only upon the time required to divide the frequency in the feedback path by a different number, if a channelization voltage is simultaneously applied to the VCO, channelization is extremely rapid.
AC modulation of the forward path, at frequencies above the loop frequency, may be achieved by applying an analog voltage, or modulating voltage, to the VCO via a modulation resistor, as taught in the aforesaid Lautzenhiser patents, or by any other suitable means.
DC modulation of the feedback path may be achieved by digital manipulation of pulses in the feedback path, as taught by Lautzenhiser in the aforesaid patents, or by any other suitable means.
In phase-locked oscillators, an error signal is produced by a difference in a feedback frequency to a reference frequency. This error signal may be integrated by analog or digital circuitry into phase-locking information for a given channelized frequency.
In phase-locked oscillators that use an analog integrator, the error signal is time integrated. This time-integrated error signal, which is a voltage, is applied to a capacitor and to a voltage-controlled oscillator (VCO) during the integration process. The error signal disappears and integration stops when phase lock is achieved, but the capacitor has been charged to a phase-locking voltage, or a channelizing voltage.
In phase-locked oscillators that use a digital integrator, the error signal is integrated by summing clock-timed UP, DOWN, and/or ZERO error signals. Digital-to-analog (D/A) conversion changes the digitally-integrated error signal into a voltage which is applied to the VCO during the integration process. The error signal disappears and integration stops when phase lock is achieved, but the digitally-accumulated error signals have become digital phase-locking information.
BRIEF SUMMARY OF THE INVENTION
The present invention provides digital integrators with digital lead compensators, and phase-locked oscillators that include digital integrators with digital lead compensators. The digital integrators include special circuitry that mimics analog circuitry for lead compensating the output of the integrator, thereby providing loop stability in phase-locked oscillators, even as analog integrators use a lead resistor in series with an integrating capacitor to achieve lead compensation and loop stability.
With regard to digitally integrating, in all embodiments the method of the present invention includes: repeatedly phase detecting, producing UP and DOWN signals in response to the repeated phase detecting steps; and integrating, or algebraically-summing, digital channelizing information, or digital phase-locking information, as a function of the UP and DOWN signals. More particularly, digitally integrating includes decoding plus one, minus one, and zero correction signals from the UP and DOWN signals; and algebraically summing the minus one, plus one, and zero correction signals into the digital channelizing information, or digital phase-locking information.
With regard to lead compensating, in all embodiments, the method of the present invention includes: decoding digital lead-compensation information from the UP and DOWN signals, and using the digital lead-compensation information to offset the output frequency in a leading direction when the digital phase-locking information is driving the output frequency toward phase lock.
In first and second embodiments, lead compensating includes analog summing of a channelizing voltage and a lead-compensation voltage subsequent to digital-to-analog (D/A) converting both the digital phase-locking information and the digital lead-compensation information. In a third embodiment, lead compensating includes digitally summing the digital phase-locking information and the digital lead-compensation information prior to digital-to-analog converting.
In frequency-hopping oscillators taught herein, the method of the present invention includes producing UP and DOWN signals by phase detecting, decoding the UP and DOWN signals into increment/decrement signals, recalling previously stored phase-locking information, parallel adding a single increment/decrement pulse to the recalled phase-locking information in accordance with a sign (plus one, minus one, and/or zero) of the increment/decrement signal, and storing the corrected phase-locking information in a RAM. That is, recalling, parallel adding, and again storing provide a step of algebraically summing.
The method of the present invention further includes recalling the corrected phase-locking information, repeatedly phase detecting, repeating the parallel adding, storing, and recalling steps at a clock frequency, thereby digitally integrating phase-locking information that is progressively corrected, stored, and recalled, one increment/decrement pulse at a time, at the clock frequency.
The method of the present invention still further includes using the repeatedly recalled phase-locking information, that is being corrected one increment/decrement pulse at a time at the clock frequency, to drive the output frequency of a voltage-controlled oscillator progressively closer to phase lock substantially simultaneous with the parallel adding, storing, and recalling steps.
In addition to lead-compensated digital integrators, the present invention includes improved digital-to-analog (D/A) converters that can be characterized as: producing analog outputs that are intentionally nonlinear; producing an output voltage of each of a plurality of higher bits that is less than twice the analog output of each of a plurality of respective lower bits; producing an output voltage from each of a plurality of higher bits that is less than the sum of a maximum output of all respective lower bits; producing analog outputs with a plurality of downward steps; producing a plurality of dual addresses; and being without holes, all irrespective of component variables.
By definition, a D/A converter has a hole if an i

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