Phase-locked loop with static phase offset compensation

Details Phase-locked loop with static phase offset compensation Phase-locked loop with static phase offset compensation

1998-09-01

2000-03-28

Pascal, Robert

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 17, 327156, 327157, G09F 1326

Patent

active

060437154

ABSTRACT:
A phase-locked loop (PLL) has a master circuit configured to a slave circuit. The slave circuit has a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator configured to operate as a closed-loop PLL. The master circuit has a phase detector and a charge pump that are similar to the corresponding components in the slave circuit. The master circuit is configured to receive two input signals with zero phase offset. As such, any net current charge generated by the master charge pump will be indicative of mismatch within the master phase detector and charge pump, and therefore, by analogy, indicative of mismatch within the slave phase detector and charge pump, as well. A voltage signal generated by the master circuit is applied to control the generation of currents by the slave charge pump in such a way as to compensate for static phase offset that would otherwise exist in the slave circuit.

REFERENCES:
patent: 5838205 (1998-11-01), Ferriaolo et al.
"A Self Correcting Clock Recovery Circuit," by Charles R. Hogge, Jr., IEEE Journal of Lightwave Technology, vol. LT-3, Dec. 1985, pp. 1312-1314.

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