Phase locked loop with high and/or low frequency limit detectors

Details Phase locked loop with high and/or low frequency limit detectors Phase locked loop with high and/or low frequency limit detectors

1984-07-06

1986-05-20

LaRoche, Eugene R.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 25, 331DIG2, H03L 706

Patent

active

045904405

ABSTRACT:
A phase locked loop circuit (16) includes means to eliminate harmonic frequency locking. The phase locked loop includes a voltage controlled oscillator (1) which provides an output signal (V.sub.out) which is compared with the input signal (V.sub.in) by a phase detector (4). The output signal from the phase detector is integrated and the output signal of the integrator (7) is placed on the control input lead of the voltage controlled oscillator. The output signal of the voltage controlled oscillator is provided to a frequency detector (14, 17) which determines if the output frequency is within a predefined range. If the output frequency is above the predetermined range, a limiter circuit (15) provides a low voltage output signal to the control input lead of the VCO in order to pull the input voltage of the VCO to a voltage which corresponds with the appropriate operating range of the phase locked loop. If the output frequency of voltage controlled oscillator is below the predefined frequency range, the limiter circuit provides a high voltage output signal to the control input lead of the VCO in order to pull the input voltage of the voltage controlled oscillator to a voltage which corresponds with the proper operating frequency range of the phase locked loop.

REFERENCES:
patent: 3959737 (1976-05-01), Tanis
patent: 4258333 (1981-03-01), Demuliere et al.
patent: 4388596 (1983-06-01), Yamashita
patent: 4510461 (1985-04-01), Dickes et al.
Helszajn, J.; "YIG Resonators and Systems", Electronic Engineering, Dec. 1983, pp. 47-56.

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