Phase locked loop with a modulator

Details Phase locked loop with a modulator Phase locked loop with a modulator

2007-10-16

2007-10-16

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S025000

Reexamination Certificate

active

11145822

ABSTRACT:
The invention provides a phase locked loop having a modulator which is based on a ΣΔ fractional N phase locked loop. In the forward path of the PLL, the output of the oscillator has an additional frequency divider which provides the output frequency of the PLL in a plurality of different phases. A multiplexer which is connected upstream of the multimodulus divider in the PLL's feedback path and which is actuated by the ΣΔ modulator, like the divider, selects the respective desired phase. This allows the minimum step size of the division factors to be reduced to values of less than 1 relative to the output frequency, which significantly reduces the quantization noise. The PLL bandwidth may therefore advantageously be the same size as the modulation bandwidth.

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