Phase-locked loop with a locking aid circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

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331 25, 327227, 327230, H03L 710, H03K 3033

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active

059528893

ABSTRACT:
A phase-locked loop of the type including a locking aid circuit providing a d.c. presetting signal representative of the carrier frequency of an input signal to set the quiescent frequency of a controlled oscillator of the phase-locked lop. The locking aid circuit includes a monostable latch clocked by the input signal to provide pulses of predetermined width, the presetting signal corresponding to the mean value of these pulses.

REFERENCES:
patent: 4580107 (1986-04-01), Caldwell et al.
patent: 4717891 (1988-01-01), Ichise et al.
patent: 4952850 (1990-08-01), Ogino et al.
Patent Abstracts of Japan, vol. 002, No. 102 (E-052), Aug. 23, 1978 & JP-A-53 068553 (Mitsubishi Electric Corp.).
Patent Abstracts of Japan, vol. 007, No. 251 (E-209), Nov. 8, 1983 & JP-A-58 137308 (Nippon Denki KK).
Hallmark J., et al., "FM PLL Demodulator With Loop Bandwidth Controlled By Transistor Matching" Motorola Technical Developments, vol. 8, No. 1, Oct. 1988, pp. 67-69.

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