Phase locked loop using a counter and a microcontroller to produ

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural oscillators controlled

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331 14, 331 17, 331 25, H03L 707

Patent

active

057266077

ABSTRACT:
A digitally controlled phase locked loop generates a derived clock signal that is frequency locked to a reference clock signal. The apparatus is comprised of a microcontroller, counter, digital to analog converter (DAC) and a voltage controlled crystal oscillator (VCXO) connected in a feedback loop arrangement. A frequency output derived from the VCXO periodically samples an incoming reference signal. The sampled count value is compared to an ideal count value associated with the same sampling time period. A microcontroller and software-based algorithm perform the phase comparison and loop filter operations of the phase locked loop (PLL).

REFERENCES:
patent: 4282493 (1981-08-01), Moreau
patent: 4450518 (1984-05-01), Klee
patent: 4864253 (1989-09-01), Zwack

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