Phase locked loop tuning control system including a sync activat

Details Phase locked loop tuning control system including a sync activat Phase locked loop tuning control system including a sync activat

1980-12-01

1982-11-09

Masinick, Michael A.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

3581951, 455184, 455260, H04N 550

Patent

active

043587917

ABSTRACT:
In a phase locked loop PLL tuning control system for a voltage controlled local oscillator of the type wherein an automatic fine tuning voltage is selectively applied to the local oscillator after a PLL configuration has obtained lock at the nominal frequency value for the selected channel so as to accommodate frequency translated RF carriers, a circuit selectively activated by the average level of composite synchronization pulses indicative of improper tuning clamps the AFT voltage at a predetermined level. The predetermined level is selected to force the local oscillator frequency to be driven to an offset value at which an offset detector causes reinitiation of PLL control at discrete frequency step from the nominal value for the selected channel.

REFERENCES:
patent: 3858000 (1974-12-01), Merriweather et al.
patent: 3867568 (1975-02-01), Merriweather
patent: 3944725 (1976-03-01), Aruaugham
patent: 3952143 (1976-04-01), Siwko
patent: 4000476 (1976-12-01), Walker et al.
patent: 4025953 (1977-05-01), Sideris
patent: 4031549 (1977-06-01), Rast et al.
patent: 4077016 (1978-02-01), Sanders et al.
patent: 4078212 (1978-03-01), Rast

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