Phase locked loop timing recovery circuit

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

307262, 307269, 328 63, 331 1A, H04L 708

Patent

active

043732046

ABSTRACT:
The phase of timing signals is compared with the phase of incoming digital signals to produce phase error signals and repeated phase corrections of the timing signals are made in accordance with the phase error signals. The phase corrections are initially delayed until phase error signals exceeding a predetermined magnitude persist for a predetermined interval of time. The corrections are removed without delay when the phase error signals are discontinued.

REFERENCES:
patent: 3141930 (1964-07-01), Krauss
patent: 3404230 (1968-10-01), Hailey et al.
patent: 3488440 (1970-01-01), Logan et al.
patent: 3646269 (1972-02-01), Fudemoto et al.
patent: 4216544 (1980-08-01), Boleda et al.

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