Phase-locked loop (PLL) for radio-frequency (RF) signals

Details Phase-locked loop (PLL) for radio-frequency (RF) signals Phase-locked loop (PLL) for radio-frequency (RF) signals

1999-06-07

2001-04-10

Kinkead, Arnold (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

C331S016000, C327S536000, C327S156000, C327S157000

Reexamination Certificate

active

06215362

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a phase-locked loop (PLL) for radio-frequency (RF) signals. Phase-lock loops of this type generally have a voltage-controlled oscillator outputting a signal received by a loop mixer. The loop mixer in turn outputs a signal received by a phase frequency detector (PFD). The PFD also receives a further input signal and outputs signals received by a charge pump. In turn, the charge pump outputs signals controlling the voltage-controlled oscillator.
Various RF circuits which can be implemented as integrated circuits (ICs) using present day semiconductor technologies and have a phase-locked loop (PLL) have been developed for telecommunication systems. In general, these systems have a PLL frequency synthesizer with a loop mixer (MPLL) or an upconversion modulation loop transmitter (UML-TX) with a local signal and a reference signal generated by an oscillator or frequency synthesizer. In these systems precharging is achieved by software programming, the term “software precharging” is used for this. The solution of software precharging has the following disadvantages:
1) there is a high power consumption in the case of precharging, because the R/1 and N/1 dividers, a phase-frequency detector and a charge pump must be switched on;
2) in a time frame and time slots of TDMA (Time Division Multiple Access) cellular systems such as, for example, GSM or PCN, in which the time frame (4.616 ms) is divided into 8 time slots (577 &mgr;s), critical timing of drive signals for the PLLs arises, because the circuits are switched on by software using two separate programming operations (precharging and active); and
3) precharging is required both for single-band and for dual-band applications without band changing, because the PLLs have a non-defined voltage when switched off, depending on the output frequency of the voltage-controlled oscillator (VCO).
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a phase-locked loop (PLL) for radio-frequency (RF) signals which overcomes the above-mentioned disadvantages of the prior art devices of this general type.
With the foregoing and other objects in view there is provided, in accordance with the invention, a phase-locked loop for radio-frequency signals, including:
a voltage controlled oscillator generating an output signal;
a loop mixer receiving and mixing the output signal from the voltage controlled oscillator with a local oscillator signal and outputting a mixed signal;
a phase-frequency detector receiving a reference signal and the mixed signal, and outputting charge pump signals;
a charge pump circuit generating a control voltage and containing a charge pump receiving the charge pump signals from the phase-frequency detector and a precharge pump supplementing the charge pump, the precharge pump receiving and driven by logic control signals including a first logic control signal and a second logic control signal, the first logic control signal ensuring during precharging that the phase-locked loop is in a standby mode and that only the precharge pump is in an active mode, and, conversely, after the precharging the phase-locked loop is in an active mode and the precharge pump is in a standby mode, and the second logic control signal ensuring that the precharge pump applies the control voltage required for setting an initial state of the voltage-controlled oscillator to allow a fast lock-in of the voltage-controlled oscillator during a settling phase; and
a passive loop low-pass filter receiving the control voltage and outputting a filtered control voltage received by and controlling the voltage-control oscillator.
It is an object of the invention to specify for PLLs possibilities for carrying out precharging which manage with a low power consumption during precharging and exhibit noncritical timing for precharging, and in the case of which the programming operation for precharging is eliminated for single-band and dual-band applications, with the result that the PLLs can be switched on faster.
The PLLs configured according to the invention are advantageously constructed using integrated circuit (IC) technology.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a phase-locked loop (PLL) for radio-frequency (RF) signals, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


REFERENCES:
patent: 4562411 (1985-12-01), O'Rourke et al.
patent: 5164889 (1992-11-01), Ruetz
patent: 5220294 (1993-06-01), Ichikawa

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