Phase-locked loop, phase comparator for use in the phase-locked

Details Phase-locked loop, phase comparator for use in the phase-locked Phase-locked loop, phase comparator for use in the phase-locked

1995-09-26

1997-04-08

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 17, 331 27, 327 12, H03D 1300, H03L 7085

Patent

active

056191715

ABSTRACT:
A phase-locked loop includes an input terminal (1) for receiving a binary signal, a phase comparator (3) having a first input (2) coupled to the input terminal (1), having a second input (4), and having an output (5) coupled to an input (9) of a control-signal-controlled oscillator (10) via a control-signal generator unit (7). An output (11) of the oscillator is coupled to the second input of the phase comparator. The phase comparator derives a first pulse (P.sub.1) and a second pulse (P.sub.2) in response to a signal transition from a first value to a second value in the binary signal applied to the first input and an oscillation signal applied to the second input, the first pulse having a pulse width which is a measure of the phase difference between the binary signal and the oscillation signal, and the second pulse having a pulse width proportional to 1/2.f.sub.o, where f.sub.o is the frequency of the oscillation signal. The control-signal generator unit (7) derives a control signal from the first pulse and the second pulse and applies the control signal to the oscillator, and the control-signal generator unit derives such a control signal from the first pulse and the second pulse that the phase difference is controlled substantially toward zero.

REFERENCES:
patent: 4371974 (1983-02-01), Dugan
patent: 4422176 (1983-12-01), Summers
patent: 4535459 (1985-08-01), Hogge, Jr.
patent: 5432480 (1995-07-01), Popescu

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