Phase locked loop lock detector including loss of lock and gain

Details Phase locked loop lock detector including loss of lock and gain Phase locked loop lock detector including loss of lock and gain

1991-08-08

1992-06-30

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 25, 331DIG2, H03L 7095

Patent

active

051266903

ABSTRACT:
A phase lock detector circuit for detecting the lock state of a phase locked loop (PLL) such that it is known when a synthesized clock has achieved a stable phase relationship with its reference clock signal. The PLL includes an input for receiving the reference signal, a digital phase detector, a voltage controlled oscillator, and a frequency divider. The phase lock detector of the present invention includes a loss of lock detector (LOLD) connected to the frequency divider, the phase detector and the input. The LOLD detects the occurrence of a selected phase difference between the reference signal and an output of the frequency divider for a selected number of cycles. Also included is a gain of lock detector (GOLD) connected to the frequency divider and the input. The GOLD detects the occurrence of the reference signal within a selected phase difference of an output of the frequency divider for a second selected number of cycles. The outputs of the LOLD and the GOLD are connected to a latch for generating a composite signal responsive to signals generated by the LOLD and the GOLD such that the composite signal has a first state indicating when the PLL is in a locked condition and a second state indicating when the PLL is in an unlocked condition. The phase differences and the selected number of cycles of the LOLD and GOLD may be programmed, as desired.

REFERENCES:
patent: 4287480 (1981-09-01), Swift et al.
patent: 4633488 (1986-12-01), Shaw
patent: 4745372 (1988-05-01), Miwa
patent: 4929916 (1990-05-01), Fukuda
patent: 5008635 (1991-04-01), Hanke et al.

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