Phase locked loop lock detector and method

Details Phase locked loop lock detector and method Phase locked loop lock detector and method

1974-11-20

1976-05-11

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

307233R, 328133, 331 11, 331 17, 331 2S, H03B 304

Patent

active

039567109

ABSTRACT:
Apparatus and method for determining when a phase lock loop is in a state of lock is disclosed. The input frequency and the VCO frequency of a phase locked loop are combined by a difference multiplier to produce a signal having their difference frequency. The difference frequency signal is transformed into a squarewave by a limiter and the squarewave is then fed into a binary counter which counts the frequency of the squarewave pulses. Circuitry including a clock, two monostables, an AND gate, and a one cycle memory flip-flop periodically monitors the count of the binary counter and produces a signal indicating a state of unlock when the count of the binary counter exceeds a predetermined limit. An inhibit signal which prevents the binary counter from continuing to count is generated when the predetermined count limit has been reached in any one monitored time period.

REFERENCES:
patent: 3185938 (1965-05-01), Pelosi
patent: 3401353 (1968-09-01), Hughes
patent: 3611175 (1971-10-01), Boelke
patent: 3694766 (1972-09-01), Boelke

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