Phase-locked loop IC having ECL buffers

Details Phase-locked loop IC having ECL buffers Phase-locked loop IC having ECL buffers

1991-11-27

1992-10-20

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 8, 331 11, 331 17, 331 25, 331 27, 307514, 328133, 360 51, H03L 7087, H03L 7093

Patent

active

051573547

ABSTRACT:
A phase locked loop IC comprising a voltage controlled oscillator which generates a clock signal in accordance with a control voltage, a first ECL input buffer which is an input buffer for a signal to be synchronized, a phase-lock capture circuit for producing a current determinative of the control voltage in accordance with the phase difference and the frequency difference between the signal to be synchronized and the clock signal, and a phase-lock follow-up circuit for producing a current determinative of the control voltage in accordance with the phase difference between the clock signal and the signal to be synchronized; wherein the supply voltage system of the first ECL input buffer is so disposed as to be isolated from any of the supply voltage systems of the voltage-controlled oscillator, the phase-lock capture circuit and the phase lock follow-up circuit, while the ground system of the first ECL input buffer is so disposed as to be insolated from any of the ground systems of the voltage-controlled oscillator, the phase-lock capture circuit and the phase-lock follow-up circuit.

REFERENCES:
patent: 4787097 (1988-11-01), Rizzo
patent: 4803705 (1989-02-01), Gillingham et al.
patent: 4942370 (1990-07-01), Shigemori
patent: 4943788 (1990-07-01), Laws et al.
Journal of Solid-State Circuits, vol. 23, No. 2, Apr. 1988, pp. 474-479, Kato et al., "A Low-Power 128-MHz VCO for Monolithic PLL IC's".

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