Phase locked loop having reduced response time

Details Phase locked loop having reduced response time Phase locked loop having reduced response time

1987-07-17

1989-03-28

Griffin, Robert L.

Telecommunications

Receiver or analog modulated signal frequency converter

Local control of receiver operation

455264, 375120, 331 55, H03B 2700, H03D 324

Patent

active

048171999

ABSTRACT:
Apparatus and method for reducing the response time for changing a phase locked loop from one frequency to another in which a condition indicative of a frequency change is detected and the conditions in the phase locked loop are changed in response thereto. Specifically, the counts in the loop divider are reset to a predetermined count and an in-phase condition is simulated in the loop phase detector, thereby creating the conditions that are necessary for the phase locked loop to produce the new frequency without the time consuming incremental frequency adjustments that are normally required.

REFERENCES:
patent: 3921095 (1975-11-01), Chu
patent: 4005479 (1977-01-01), Hunnicutt et al.
patent: 4270210 (1981-05-01), Tan et al.
patent: 4330758 (1982-05-01), Swisher
patent: 4406017 (1983-09-01), Takahashi
patent: 4451930 (1984-05-01), Chapman et al.
patent: 4494079 (1985-01-01), Light
patent: 4607393 (1986-08-01), Nolde et al.
patent: 4634998 (1987-01-01), Crawford

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