Phase locked loop having frequency divider coupled to stub on VC

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

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331 99, 331117D, 331177V, H03B 518, H03L 718

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active

059297123

ABSTRACT:
A phase locked loop includes a voltage controlled oscillator, a frequency divider for frequency-dividing an output from the voltage controlled oscillator, a phase comparator for comparing an output from the frequency divider with a phase of a reference signal, and a control circuit for controlling the oscillator frequency of the voltage controlled oscillator on the basis of an output from the phase comparator. The voltage controlled oscillator and the frequency divider are formed within a single integrated circuit chip, and the input terminal of the frequency divider is connected to a short stub having an open end connected to the voltage controlled oscillator.

REFERENCES:
patent: 4619001 (1986-10-01), Kane
patent: 5130675 (1992-07-01), Sugawara
patent: 5565821 (1996-10-01), Murtojarvi
P. Leber, et al., "A Completely Integrated Single-Chip Phase-Locked Loop with a 15 GHz VCO Using 0.2-.mu.m E-/D-HEMT-Technology", IEEE GaAs IC Symposium, 1996, pp. 85-88.
B. Razavi, et al., "A 6 GHz 60 mW BiCMOS Phase-Locked Loop", IEEE Journal of Solid-State Circuits, vol. 29, No. 12, Dec. 1994, pp. 1560-1565.
U. Guettich, et al., "Ka-Band Monolithic-VCOs for Low Noise Applications Using GaInP/GaAs HBTs", IEEE 1994 Microwave and Millimeter-Wave Monolithic Circuits Symposium, pp. 165-168.

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