Phase locked loop having control circuit for automatically opera

Details Phase locked loop having control circuit for automatically opera Phase locked loop having control circuit for automatically opera

1998-09-18

2000-10-03

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 34, 331 57, H03L 7099

Patent

active

061278963

ABSTRACT:
A phase locked loop (1) including an oscillator (5), usually made as a voltage controlled oscillator (VCO), arranged to operate selectively according to different input/output characteristics. The circuit further includes a control circuit (81) for selectively controlling the operation of the oscillator (5) thereby making the oscillator (5) itself operate on one of an optimum characteristic selectively determined according to the operating conditions of the loop (1).

REFERENCES:
patent: 5075640 (1991-12-01), Miyazawa
Novof et al, "Fully Integrated CMOS Phase-Locked Loop with 15 to 240 MHz Locking Range and .+-.50 ps Jitter" ISSCC Dig. Tech. Papers, pp. 112-113, Feb. 1995.
"Towards a Channel Allocation Scheme for SDMA-Based Mobile Communication Systems", Notker Gerlich, University of Wurzburg Institute of Comp.Science . . . , Report No. 104, Feb. 1995.

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