Phase locked loop for use with discontinuous input signals

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 25, H03L 708

Patent

active

043630030

ABSTRACT:
A PLL circuit which comprises a phase comparator, a voltage-controlled oscillator whose oscillation frequency is controlled by an output from the phase comparator, a flip-flop circuit adapted to be set by an input signal, and a counter circuit responsive to an output condition of the flip-flop circuit to count an output from the voltage-controlled oscillator. The flip-flop circuit is adapted to be reset by an output from the counter circuit, and the phase comparator is adapted to receive an output from the flip-flop circuit and the output from the voltage-controlled oscillator.

REFERENCES:
patent: 3697884 (1972-10-01), Fort et al.
patent: 4017806 (1977-04-01), Rogers
patent: 4310805 (1982-01-01), Hackert et al.

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