Phase-locked loop for signals having rectangular waveforms

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

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Details

331 1A, 331 14, 331 17, 327156, 327159, H03L 708, H03L 7085, H03L 710, H03L 7191

Patent

active

057105260

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND

The invention relates to a phase-locked loop.
Such a phase-locked loop is disclosed, for example, in the book entitled "Samenvattingen van de post-academische cursus Phase Lock Loop"("Summaries of the post-academic course entitled Phase Lock Loop"), Delft Technical University, Electronics Department, January 1980, pages 99 to 101 inclusive. In the latter, use is made of a phase detector comprising a single digital multiplier, for example an exclusive OR gate, a NAND gate or an OR gate. The input signals of the detector have a square waveform. The detector has a transfer characteristic f(.theta.), .theta. being the phase difference between the input signals, one of which is a reference signal, of the detector having a cyclic triangular waveform which is completely above f(.theta.)=0, with a minimum at f(0.+-.M 360.degree.), where M is an integer (see FIG. 5 of this application). The loop is so adjusted that in the locked state, that is to say with no frequency difference between the input signals of the detector, .theta.=90.degree., i.e. the two input signals of the detector are shifted by 90.degree. with respect to one another, as a result of which the detector provides, in the locked state ("in-lock"), an output signal having a pulsed form with a frequency which is twice the reference frequency and whose pulse width is equal to 1/4 of the cycle of the reference signal. In the locked state, or quiescent state, of the loop, the detector therefore provides a strongly pulsating output signal, said pulses forming the so-called ripple of the output signal of the detector in the locked state, in which state the control signal has a quiescent level for the oscillator. Because the pulses have a high energy content, they have a strongly disturbing influence on the frequency stability of the output signal of the oscillator. Because it is a point half way up the slopes of the triangular transfer characteristic of the detector which is the equilibrium point for the locked state of the loop, the output signal of the detector is independent of a frequency difference between the input signals of the detector as seen over a number of cycles of the reference signal, all the phase differences between the input signals of the detector being traversed; or in other words, the averaged output signal of the detector as seen over a number of cycles of the reference signal is independent of a frequency difference between the input signals of the detector. In the case of a frequency difference between the input signals of the detector which is great with respect to the loop bandwidth, the capture will take place slowly or in a creeping manner, which is very undesirable for many applications of the phase-locked loop.


SUMMARY

The object of the invention is to improve the known phase-locked loop.
This object is achieved by means of the phase-locked loop according to the present invention. As a result, in the case of a frequency difference between the reference signal and another input signal of the phase detector, the oscillator receives a control signal which rapidly sets the loop to the locked state.
Preferably, the phase-locked loop is constructed to provide a cyclic transfer characteristic f(.theta.) having a triangular waveform for which f(.theta.)=0 in the locked state of the loop. The points of the triangular waveforms occur at an interval of 180.degree. and not at .theta.=0. The equilibrium point of the loop is therefore on a slope at .theta.=0. As a result, no ripple appears, in principle, on the output signal of the detector in the locked state, as a result of which the oscillator is not disturbed by such a ripple and the oscillator delivers a more stable output frequency in the locked state. With imperfect operation of the loop in the locked state, only a small ripple occurs which has a small energy content and double the frequency of the reference frequency, which ripple is easy to remove or to minimize.
Since, when a frequency difference occurs between the input signals of the phase detector, the oscillator

REFERENCES:
patent: 4888564 (1989-12-01), Ishigaki
patent: 5148123 (1992-09-01), Ries
patent: 5216387 (1993-06-01), Telewski et al.
067751!.
Duk-Kyu Park et al., "Fast Acquisition Frequency Synthesizer with the Multiple Phase Detectors", IEEE Pacific Rim Conference on Communications Computers and Signal Processing, vol. 2, May 9, 1991, New York, pp.665-668 .

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