Phase locked loop for controlling an optical recording...

Details Phase locked loop for controlling an optical recording... Phase locked loop for controlling an optical recording...

2007-04-17

2007-04-17

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural a.f.s. for a single oscillator

C331S016000, C331S018000, C360S051000

Reexamination Certificate

active

11383754

ABSTRACT:
A phase locked loop (PLL) system for generating a reference clock to write recording data on an optical medium includes a clock generator generating the reference clock according to a phase difference between the reference signal and a first frequency-divided signal; a phase-shift detector generating a phase adjusting signal; and a phase-controllable frequency divider dividing the frequency of the reference clock to generate the first frequency-divided signal, and receiving the phase adjusting signal to adjust the phase of the first frequency-divided signal. The phase-shift detector includes an ADIP sync detector generating an ADIP synchronization signal synchronous to the ADIP units of the optical medium; a frequency divider dividing the reference clock to generate a second frequency-divided signal; and a phase difference detector detecting a phase difference between the second frequency-divided signal and the ADIP synchronization signal to generate the phase adjusting signal.

REFERENCES:
patent: 6710951 (2004-03-01), Cloke
patent: 7075375 (2006-07-01), Chen et al.
patent: 2001/0055249 (2001-12-01), Moriwaki
patent: 2002/0105389 (2002-08-01), Nishimura et al.
patent: 2003/0067356 (2003-04-01), Pokui et al.
patent: 2004/0095861 (2004-05-01), Hsu et al.
patent: 1501582 (2004-06-01), None
patent: 0076981 (1983-04-01), None

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