Phase-locked loop for a modem

Details Phase-locked loop for a modem Phase-locked loop for a modem

1986-07-15

1989-02-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307262, 307269, 307511, H03K 513, H03K 522

Patent

active

048089370

ABSTRACT:
A modem and an improved phase-locked loop used in the modem. A presettable counter (251) generates the desired signal (TXCLKOUT). The reference input clock signal (TXCLKIN) and the generated clock signal (TXCLKOUT) are compared by an exclusive-OR gate (254). The output of the gate (254) is sampled by two flip-flops (256,266) before and after a rising edge of the TXCLKOUT signal. If the TXCLKIN and TXCLKOUT signals differ by more than a desired phase window a logic circuit (264) adjusts the preset inputs of the counter (251) so that the TXCLKIN and TXCLKOUT signals are in phase within the desired phase window.

REFERENCES:
patent: 4280099 (1981-07-01), Rattlingourd
patent: 4400817 (1983-08-01), Sumner
patent: 4455661 (1984-06-01), Qureshi
patent: 4472818 (1984-09-01), Zapisek et al.
patent: 4488294 (1984-12-01), Christensen et al.
patent: 4538119 (1985-08-01), Ashida
patent: 4680780 (1987-07-01), Agoston et al.

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