Phase locked loop filter

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

Reexamination Certificate

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C331S025000

Reexamination Certificate

active

10561556

ABSTRACT:
A phase locked loop filter comprising a first capacitor for connecting to a first charge pump path; and a parallel resistor/capacitor circuit for connecting to a second charge pump path with the resistor/capacitor circuit having a second capacitor; wherein the first capacitor and second capacitor are connected in series to allow a voltage associated with the first capacitor and a voltage associated with the parallel resistor/capacitor circuit to be added together.

REFERENCES:
patent: 5424689 (1995-06-01), Gillig et al.
patent: 5774023 (1998-06-01), Irwin
patent: 6995607 (2006-02-01), Dosho et al.
patent: 2004/0101081 (2004-05-01), Hsu
Craninckx et al; “A Fully Integrated CMOS DCS-1800 Frequency Synthesiser”; IEEE Journal of Solid-State Circuits, vol. 33, No. 12, Dec. 1998, pp. 2054-2065.
Craninckx et al; “A Fully Integrated CMOS DCS-1800 Frequency Synthesiser”; IEEE International Solid-State Circuits Conference, pp. 372-374.
Koo et al; “A Fully Integrated CMOS Frequency Synthesiser with Charge-Averaging Charge Pump and Dual-Path Loop Filter for PCS- and Cellular-CDMA Wireless Systems”; IEEE Journal of Solid-State Circuits, vol. 37, No. 5, May 2002.

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