Phase locked loop comprising a ΣΔ modulator

Details Phase locked loop comprising a ΣΔ modulator Phase locked loop comprising a ΣΔ modulator

2006-10-17

2006-10-17

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S00100A, C331S025000, C327S117000, C341S143000, C377S047000

Reexamination Certificate

active

07123101

ABSTRACT:
The invention is directed to a phase locked loop with a ΣΔ modulator. A multimodulus divider in the feedback path of the PLL is actuated by the ΣΔ modulator. The latter has a design which can be described by a complex transfer function H(s) in the Laplace plane, said transfer function having a complex-conjugate pair of pole points. The arrangement allows a significant reduction in the noise in critical frequency domains and hence allows adherence to transmission masks based on radio specification even when the PLL bandwidth is as large as the modulation bandwidth.

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