Phase locked loop clock synchronizer and signal detector

Pulse or digital communications – Repeaters – Testing

Patent

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Details

375120, 331 11, 329 50, H03D 318, H03D 324

Patent

active

048377813

ABSTRACT:
A phase locked loop system is described for synchronizaing a clock signal to an incoming digital signal and simultaneously detecting that digital signal. The loop is capable of unaided frequency acquisition, hence eliminating the need for special circuits to "pull" the loop into lock when the incoming data rate differs from the initial frequency of the VCO.

REFERENCES:
patent: 3906376 (1975-09-01), Bass
patent: 3908115 (1975-09-01), Waggener
patent: 4218771 (1980-08-01), Hogge, Jr.

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