Phase-locked loop circuit with a mixed mode loop filter

Pulse or digital communications – Receivers – Angle modulation

Reexamination Certificate

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Reexamination Certificate

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07733985

ABSTRACT:
A phase-locked loop circuit includes a phase and frequency detector receiving a reference signal and an output signal of the phase-locked loop circuit for generating a detected signal representing a frequency or phase difference therebetween. A digital charge pump coupled to the phase and frequency detector generates a charge control signal in response to the detected signal. A mixed mode loop filter coupled to the digital charge pump filters the charge control signal and generates an oscillation control signal. A voltage controlled oscillator is coupled to the mixed mode loop filter for generating the output signal of the phase-locked loop circuit by adjusting its oscillation frequency in response to the oscillation control signal. The mixed mode loop filter has both digital and analog characteristics in carrying out filtering the charge control signal, thereby reducing a layout area for the same to be implemented on a semiconductor substrate.

REFERENCES:
patent: 5978425 (1999-11-01), Takla
patent: 6864753 (2005-03-01), Lee et al.
patent: 2004/0201428 (2004-10-01), Kenney et al.
patent: 2005/0062550 (2005-03-01), Melanson
patent: 2005/0237120 (2005-10-01), Park
patent: 095133032 (2006-02-01), None
Lee, Tai-Cheng and Razavi, Behzad, “A Stabilization Technique for Phase-Locked Frequency Synthesizers”, IEEE Journal of Solid-State Circuits, (Jun. 2003) vol. 38, No. 6, pp. 888-894.

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