Phase locked loop circuit using fractional frequency divider

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S147000

Reexamination Certificate

active

06914464

ABSTRACT:
Phase-locked loop (PLL) circuits include first and second PLL stages and use fractional frequency division. In one implementation, the first stage includes a voltage-controlled oscillator (VCO) whose output is provided to both first and second fractional frequency dividers. The output of the first frequency divider is provided to a first phase comparator whose output passes through a filter so as to provide the deviation signal that controls the output frequency of the first VCO. The output of the second fractional frequency divider is received by the second PLL stage as a reference signal.

REFERENCES:
patent: 4806879 (1989-02-01), Troxel
patent: 5353311 (1994-10-01), Hirata et al.
patent: 6366620 (2002-04-01), Jackson et al.
patent: 6611175 (2003-08-01), Heymann
patent: 6700945 (2004-03-01), Maeda
patent: 06209216 (1994-07-01), None

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