Phase-locked loop circuit obtaining the phase difference between

Details Phase-locked loop circuit obtaining the phase difference between Phase-locked loop circuit obtaining the phase difference between

1995-09-20

1997-03-04

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 16, 331 17, 331 25, 327 7, 327 12, 327107, 327159, H03L 7085

Patent

active

056083548

ABSTRACT:
A phase-locked loop circuit includes a voltage-controlled oscillator, a pre-scaler, a main counter, a shift register, and a phase comparison section. The oscillation frequency of the voltage-controlled oscillator is controlled on the basis of phase different information. The pre-scaler frequency-divides an oscillation frequency output from the voltage-controlled oscillator by one of frequency division ratios of 1/j (j is a positive integer) and 1/(j+1) which is selected in accordance with an external control signal. The main counter frequency-divides a frequency division output from the pre-scaler by a frequency division ratio of n (n is a positive integer). The shift register generates .alpha. (.alpha. is an integer equal to or larger than two) time series pulse strings which are synchronized with the output from the pre-scaler and have phases sequentially delayed by one period on the basis of a frequency division output from the main counter. The phase comparison section detects the phase differences between the .alpha. time series pulse strings from the shift register and a predetermined reference frequency signal, adds/synthesizes the detected phase differences, and outputs the resultant information as phase difference information to the voltage-controlled oscillator.

REFERENCES:
patent: 4468632 (1984-08-01), Crowley
patent: 4876518 (1989-10-01), Perkins
patent: 5315270 (1994-05-01), Leonowich
S. Takamatsu, Nippon Hoso Syuppan Kyokai, "Understanding of Application Technique of PLL", pp. 20-21, Jul. 1989.

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