Phase-locked loop circuit having a mechanism for preventing erro

Details Phase-locked loop circuit having a mechanism for preventing erro Phase-locked loop circuit having a mechanism for preventing erro

1986-12-02

1988-05-03

Laroche, Eugene R.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 8, 331 17, 331 25, H03L 708

Patent

active

047423137

ABSTRACT:
There is disclosed a phase-locked loop circuit for obtaining an output in phase with an incoming signal including a phase comparator arranged to compare phases of incoming two pulse signals to detect a phase difference between them only during a predetermined time in every period of one of said incoming pulse signals and to produce an output signal corresponding said phase difference and a controlled oscillator arranged to produce an output having an output frequency varying in accordance with the output signal of said phase comparator. According to the phase-locked loop circuit as disclosed, a pulse signal having a frequency produced by frequency division of said output frequency and a constant pulse width is formed and this pulse signal is fed to said phase comparator as the other one of said incoming pulse signals, whereby the occurrence of a false locked state is prevented.

REFERENCES:
patent: 4626797 (1986-12-01), Sakata

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