Phase-locked loop circuit having a high-speed forcible pulling-i

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 8, 331 17, 331 25, 331 34, 331 36R, H03L 700

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active

057709750

ABSTRACT:
The phase-locked loop circuit provided by the present invention has a voltage-controlled oscillating circuit that has a nonlinear characteristic representing the relation between the control voltage applied to the voltage-controlled oscillating circuit and the frequency of a signal generated thereby. With a voltage lower than a predetermined voltage V1 applied to the voltage-controlled oscillating circuit, the rate of change in frequency with a change in control voltage applied to the voltage-controlled oscillating circuit is high. As a result, the loop gain of the phase-locked loop circuit can be changed at a high speed. The phase-locked loop circuit is designed so that, when a forcible pulling-in operation is started after the phase locked state is lost due to removal of an input signal, the control voltage applied to the voltage-controlled oscillating circuit is set at a low potential from the beginning in order to increase the loop gain. As the voltage-controlled oscillating circuit has entered the forcible pulling-in operation, the forcible pulling-in operation can thus be completed in a short time. As a result, in comparison with the conventional forcible pulling-in time shortening method based on switching of the time constant of a loop filter, the changing of the frequency during the switching time can be accelerated because no device for switching of the time constant is required and, on the top of that, the stability of the forcible pulling-in operation can be enhanced.

REFERENCES:
patent: 5136260 (1992-08-01), Yousefi-Elezei
patent: 5170135 (1992-12-01), Ito et al.
patent: 5550515 (1996-08-01), Liang et al.

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