Phase-locked loop circuit for Manchester-data decoding

Details Phase-locked loop circuit for Manchester-data decoding Phase-locked loop circuit for Manchester-data decoding

1995-04-24

1996-10-15

Chin, Wellington

Pulse or digital communications

Receivers

Angle modulation

375359, 375361, 375374, 375376, H03D 322, H03D 324

Patent

active

055662129

ABSTRACT:
A phase-locked loop circuit recovering original clock information and original stream of binary data both from Manchester-coded data is disclosed. The phase-locked loop circuit comprises first, second, and third exclusive-OR circuits each with two inputs and an output. The phase-locked loop circuit further comprises a controlled oscillator that generates two local clock signals that are phase shifted from each other, preferably by an amount of 90.degree., with the first being at 0.degree. phase shift. The 0.degree. clock signal is applied to one input of the first exclusive-OR circuit having Manchester-coded data at its other input. The 90.degree. phase shifted clock is applied to one input of the second exclusive-OR circuit having Manchester-coded data at its other input. The output of each of the first and second exclusive-OR circuits, after passing through associated circuitry, is applied to the third exclusive-OR circuit. The third exclusive-OR circuit produces an output signal having a frequency that is directly proportional to that of the original clock information. The output signal of the third exclusive-OR circuit is applied to the input of controlled oscillator which, in turn, locks the 0.degree. output phase shift to the Manchester-coded data allowing the stream of binary bits to be stripped therefrom. The frequency of the 0.degree. output phase signal, by the means of operation of the controlled oscillator, becomes or corresponds to that of the original clock information.

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