Phase locked loop circuit current mode feedback

Details Phase locked loop circuit current mode feedback Phase locked loop circuit current mode feedback

1995-03-07

1997-02-18

Urban, Edward F.

Telecommunications

Receiver or analog modulated signal frequency converter

Local control of receiver operation

455255, 455259, 455264, 331 17, H04B 130

Patent

active

056049269

ABSTRACT:
A phase locked loop (PLL) circuit for use as a demodulator and other applications. The PLL circuit (200) comprises a phase detector (210), a transconductance amplifier (212) and a current controlled oscillator (ICO) (214). The phase detector has two signal inputs and two outputs, and detects a phase difference between signals at its inputs. A capacitor C1 is connected to the output of phase detector (210) and develops an output voltage signal vo(t). A transconductance amplifier (212) is coupled to the capacitor C1 and converts the output voltage signal vo(t) to an output current signal. The ICO (214) is coupled to the transconductance amplifier (212) and the second output of the phase detector (210) and generates an output signal having a frequency which is proportional to an input current signal. The output signal of the ICO (214) is coupled to the second signal input of the phase detector (212).

REFERENCES:
patent: 5144156 (1992-09-01), Kawasaki
patent: 5166641 (1992-11-01), Davis et al.
patent: 5334953 (1994-08-01), Mijuskovic
patent: 5399995 (1995-03-01), Kardontchik et al.
patent: 5495512 (1996-02-01), Kovacs et al.
ISSCC95/Session of 6/Digital Design Elements/Paper TA 6.5, 1995 IEEE International Solid State Circuits Conference.

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