Phase locked loop circuit and reproducing apparatus provided wit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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327160, 331 25, H03L 706

Patent

active

059949325

ABSTRACT:
A phase locked loop circuit for extracting a clock component from an input signal and generating a phase locked clock signal. Operates to detect a partial loss of the input signal and keep the input signal of a low-pass filter that is one component of the circuit zero. The clock signal is controlled to be far from an originally assumed signal while a partial loss of the input signal is detected. Hence, the pull-in operation of the PLL is expedited after the normal clock signal can be extracted.

REFERENCES:
patent: 5202906 (1993-04-01), Saito
patent: 5574757 (1996-11-01), Ogawa
patent: 5726607 (1998-03-01), Brede

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