Phase-locked loop circuit and data reproduction apparatus

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

Reexamination Certificate

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Details

C327S024000, C327S327000, C327S157000

Reexamination Certificate

active

07034622

ABSTRACT:
This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit33having an edge switching means4which controls the phase comparator1. The phase comparator1inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.

REFERENCES:
patent: 5729179 (1998-03-01), Sumi
patent: 6147530 (2000-11-01), Nogawa
patent: 6285726 (2001-09-01), Gaudet
patent: 6320921 (2001-11-01), Gu
patent: 6498537 (2002-12-01), Watanabe
patent: 6563888 (2003-05-01), Toriyama
patent: 6667663 (2003-12-01), Ozawa
patent: 59-33950 (1984-02-01), None

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