Pulse or digital communications – Repeaters – Testing
Patent
1988-12-15
1990-03-27
Safourek, Benedict V.
Pulse or digital communications
Repeaters
Testing
329307, 331 4, H03D 306
Patent
active
049127292
ABSTRACT:
A digital phase-locked-loop circuit is provided for deriving from a sequence of samples (J.sub.1, . . . J.sub.20) of a band-limited data signal (Vt), the phase of the data signal at the sampling instants. The circuit includes a discrete-time oscillator 10 for generating a sequence of phase values (F.sub.2, . . . F.sub.20) which characterize a periodic signal (Vk1) having an amplitude which varies as a linear function of time between two constant limit values (E, -E). The frequency of the periodic signal (Vk1) characterized by the phase values is proportional to a control value (I). An interpolation circuit (2) derives from the samples (J.sub.1, . . . J.sub.20) the relative positions (tf/T) occupied by the detection-level crossings of the data signal (Vt) relative to the sampling instants. A phase detector (3) derives the difference (.DELTA.F) between the actual phase of the data signal (Vt) and the phase as indicated by the phase values (F) from said relative positions (tf/T) and the phase values (F). The discrete-time oscillator (10) is controlled by a digital sequential filter (9) in such a way that the phase difference remains substantially zero.
REFERENCES:
patent: 4423390 (1983-12-01), Waters
patent: 4543531 (1985-09-01), Sugita et al.
patent: 4563650 (1986-01-01), York et al.
patent: 4749960 (1988-06-01), Mower et al.
Dijkmans Eise C.
Stikvoort Eduard F.
Van Rens Antonia C.
Goodman Edward W.
Safourek Benedict V.
U.S. Philips Corporation
LandOfFree
Phase-locked-loop circuit and bit detection arrangement comprisi does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Phase-locked-loop circuit and bit detection arrangement comprisi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase-locked-loop circuit and bit detection arrangement comprisi will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1656719