Phase-locked loop circuit

Details Phase-locked loop circuit Phase-locked loop circuit

1994-11-17

1995-07-11

Nelli, Raymond A.

Oscillators

Polyphase output

331 1R, H03B 2700

Patent

active

054324815

ABSTRACT:
A phase-locked loop circuit, which is used in order to extract a clock signal out of a received signal obtained from a token ring network or various LANs, has a phase comparator, a charge pump, and a voltage controlled oscillator. Said phase comparator has a window signal generating means, an edge extracting means, and a control means. This edge extracting means finds the edge existence in a received signal during the open period of said window signal. Therefore, if the center edge of the signal has a phase jitter within the open period, the extracting means can find the center edge. When the extracting means finds no edge, said control means shifts the window position by a certain bit time, so as to restart the new extracting of center edge. Thus, this circuit can recover to the synchronous state without causing a bit slip even when a center edge is lost.

REFERENCES:
patent: 4365210 (1982-12-01), Harrington et al.
patent: 4593254 (1986-06-01), Coburn
patent: 4843469 (1989-06-01), Boyce
patent: 5136253 (1992-08-01), Ueno
patent: 5166644 (1992-11-01), Saito et al.
patent: 5192915 (1993-03-01), Mathieu et al.
patent: 5208546 (1993-05-01), Nagaraj et al.
patent: 5220294 (1993-06-01), Ichikawa
patent: 5233316 (1993-08-01), Yamada et al.
patent: 5256989 (1993-10-01), Parker et al.
patent: 5276716 (1994-01-01), Winen

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